[PATCH] ARM/NEON: Improve codegen for long sext/zext operations.

[Pete Couperus]

Hi James,

Thanks for the review.  You're right, this only applies for cases
where the destination is > 128-bits.
I modified the comment, and added an assert to this effect.

Pete


On Fri, Mar 15, 2013 at 1:35 AM, James Molloy <James.Molloy at arm.com> wrote:
> Hi Pete,
>
> I'm not sure the documentation is entirely correct. It states that
> ExpandVectorExtension is designed to work on vectors "where
> size(DestVec) > 2*size(SrcVec)", but that's not quite true. For example,
> it's not designed to work on v4i8 -> v4i32 (this already produces good
> code).
>
> It's where sizeof(DestVec) > 128 bits (i.e. the vector needs to be split
> across multiple Q registers).
>
> Could you please change the documentation to reflect this? I'd also be
> happier if there was a precondition assert in the function to check its
> DestVT.getSizeInBits() > 128, in order to catch cases where a someone
> incorrectly sets smaller vectors to Custom and this code gets improperly
> called.
>
> Other than that, it looks good to me.
>
> Cheers,
>
> James
>
> On Fri, 2013-03-15 at 06:43 +0000, Pete Couperus wrote:
>> Hello,
>>
>> The ARM backend currently has poor codegen for long sext/zext
>> operations, such as v8i8 -> v8i32.
>> This patch addresses this by performing a custom expansion in ARMISelLowering.
>> This partially addresses PR14867 (http://llvm.org/bugs/show_bug.cgi?id=14867).
>> Please review!
>> Thanks,
>>
>> Pete
>
>
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