[llvm] r176622 - R600/SI: remove shader type intrinsic

Christian Konig christian.koenig at amd.com
Thu Mar 7 01:03:46 PST 2013


Author: ckoenig
Date: Thu Mar  7 03:03:46 2013
New Revision: 176622

URL: http://llvm.org/viewvc/llvm-project?rev=176622&view=rev
Log:
R600/SI: remove shader type intrinsic

Just encode the type as target specific attribute.

Signed-off-by: Christian König <christian.koenig at amd.com>
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

Modified:
    llvm/trunk/lib/Target/R600/AMDGPUInstructions.td
    llvm/trunk/lib/Target/R600/AMDGPUIntrinsics.td
    llvm/trunk/lib/Target/R600/R600ISelLowering.cpp
    llvm/trunk/lib/Target/R600/SIISelLowering.cpp
    llvm/trunk/lib/Target/R600/SIMachineFunctionInfo.cpp
    llvm/trunk/lib/Target/R600/SIMachineFunctionInfo.h

Modified: llvm/trunk/lib/Target/R600/AMDGPUInstructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUInstructions.td?rev=176622&r1=176621&r2=176622&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/AMDGPUInstructions.td (original)
+++ llvm/trunk/lib/Target/R600/AMDGPUInstructions.td Thu Mar  7 03:03:46 2013
@@ -132,13 +132,6 @@ class FNEG <RegisterClass rc> : AMDGPUSh
   [(set rc:$dst, (fneg rc:$src0))]
 >;
 
-def SHADER_TYPE : AMDGPUShaderInst <
-  (outs),
-  (ins i32imm:$type),
-  "SHADER_TYPE $type",
-  [(int_AMDGPU_shader_type imm:$type)]
->;
-
 } // usesCustomInserter = 1
 
 multiclass RegisterLoadStore <RegisterClass dstClass, Operand addrClass,

Modified: llvm/trunk/lib/Target/R600/AMDGPUIntrinsics.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUIntrinsics.td?rev=176622&r1=176621&r2=176622&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/AMDGPUIntrinsics.td (original)
+++ llvm/trunk/lib/Target/R600/AMDGPUIntrinsics.td Thu Mar  7 03:03:46 2013
@@ -50,8 +50,6 @@ let TargetPrefix = "AMDGPU", isTarget =
   def int_AMDGPU_umax : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
   def int_AMDGPU_umin : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
   def int_AMDGPU_cube : Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty], [IntrNoMem]>;
-
-  def int_AMDGPU_shader_type : Intrinsic<[], [llvm_i32_ty], []>;
 }
 
 let TargetPrefix = "TGSI", isTarget = 1 in {

Modified: llvm/trunk/lib/Target/R600/R600ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/R600ISelLowering.cpp?rev=176622&r1=176621&r2=176622&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/R600ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/R600/R600ISelLowering.cpp Thu Mar  7 03:03:46 2013
@@ -105,7 +105,6 @@ MachineBasicBlock * R600TargetLowering::
 
   switch (MI->getOpcode()) {
   default: return AMDGPUTargetLowering::EmitInstrWithCustomInserter(MI, BB);
-  case AMDGPU::SHADER_TYPE: break;
   case AMDGPU::CLAMP_R600: {
     MachineInstr *NewMI = TII->buildDefaultInstruction(*BB, I,
                                                    AMDGPU::MOV,

Modified: llvm/trunk/lib/Target/R600/SIISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/SIISelLowering.cpp?rev=176622&r1=176621&r2=176622&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/SIISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/R600/SIISelLowering.cpp Thu Mar  7 03:03:46 2013
@@ -83,12 +83,6 @@ MachineBasicBlock * SITargetLowering::Em
   default:
     return AMDGPUTargetLowering::EmitInstrWithCustomInserter(MI, BB);
   case AMDGPU::BRANCH: return BB;
-  case AMDGPU::SHADER_TYPE:
-    BB->getParent()->getInfo<SIMachineFunctionInfo>()->ShaderType =
-                                        MI->getOperand(0).getImm();
-    MI->eraseFromParent();
-    break;
-
   case AMDGPU::SI_INTERP:
     LowerSI_INTERP(MI, *BB, I, MRI);
     break;

Modified: llvm/trunk/lib/Target/R600/SIMachineFunctionInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/SIMachineFunctionInfo.cpp?rev=176622&r1=176621&r2=176622&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/SIMachineFunctionInfo.cpp (original)
+++ llvm/trunk/lib/Target/R600/SIMachineFunctionInfo.cpp Thu Mar  7 03:03:46 2013
@@ -10,11 +10,25 @@
 
 
 #include "SIMachineFunctionInfo.h"
+#include "llvm/IR/Attributes.h"
+#include "llvm/IR/Function.h"
 
 using namespace llvm;
 
+const char *SIMachineFunctionInfo::ShaderTypeAttribute = "ShaderType";
+
 SIMachineFunctionInfo::SIMachineFunctionInfo(const MachineFunction &MF)
   : MachineFunctionInfo(),
     SPIPSInputAddr(0),
-    ShaderType(0)
-  { }
+    ShaderType(0) {
+
+  AttributeSet Set = MF.getFunction()->getAttributes();
+  Attribute A = Set.getAttribute(AttributeSet::FunctionIndex,
+                                 ShaderTypeAttribute);
+
+  if (A.isStringAttribute()) {
+    StringRef Str = A.getValueAsString();
+    if (Str.getAsInteger(0, ShaderType))
+      llvm_unreachable("Can't parse shader type!");
+  }
+}

Modified: llvm/trunk/lib/Target/R600/SIMachineFunctionInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/SIMachineFunctionInfo.h?rev=176622&r1=176621&r2=176622&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/SIMachineFunctionInfo.h (original)
+++ llvm/trunk/lib/Target/R600/SIMachineFunctionInfo.h Thu Mar  7 03:03:46 2013
@@ -23,6 +23,8 @@ namespace llvm {
 /// tells the hardware which interpolation parameters to load.
 class SIMachineFunctionInfo : public MachineFunctionInfo {
 public:
+  static const char *ShaderTypeAttribute;
+
   SIMachineFunctionInfo(const MachineFunction &MF);
   unsigned SPIPSInputAddr;
   unsigned ShaderType;





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