[llvm] r176261 - AArch64: remove post-encoder method from FCMP (immediate) instructions.

[Tim Northover]

> AArch64: remove post-encoder method from FCMP (immediate) instructions.

Just a quick note on why I think that, unfortunately, this is the only
PostEncoderMethod that can be removed at the moment. For the other
uses:

MOVZ/MOVN:

This is due to relocations and we either have a post-encoder method or
enhance LLVM's fixup processing to be able to set bits to 0 as well as
1 when required. Discussions last year suggested that was even less
acceptable.

In gory detail: if someone writes "movz x2, #:sabs_g0:some_symbol"
then it is acceptable (in the ELF ABI) for some_symbol to evaluate to
(say) 0xffff_ffff_ffff_1234. In that case the required behaviour is
for the instruction to become "movn x2, #0xedcc". To do this LLVM has
to force the movz/movn bit in the instruction to 0.

Other solutions might be: refuse to relax such relocations; have only
one instruction for both movz/movk.

I think the latter is horrifically hacky, and the former would be a
disappointing change.

load-exclusive & mulhi:

These don't have an operand with authority to set the relevant bits.
We *could* pick one at random, but I think it would be entirely
arbitrary and don't like that solution.

The "neater" alternative would be adding should-be-one bits and
teaching TableGen about them. For such a small number of instructions
I don't think that's worthwhile.

Any comments or other suggestions would be welcome.

Cheers.

Tim.