[llvm] r175314 - Use the 'target-features' and 'target-cpu' attributes to reset the subtarget features.

Benjamin Kramer benny.kra at gmail.com
Mon Feb 25 02:32:02 PST 2013


On 25.02.2013, at 07:03, Bill Wendling <isanbard at gmail.com> wrote:

> Ben,
> 
> How did you generate the testcase? I need the command line and stuff.

This happened while compiling gcc.c from http://people.csail.mit.edu/smcc/projects/single-file-programs/ on i386-linux-gnu with clang -O3, so the vectorizer runs. Running bugpoint on the bitcode yielded the testcase I attached.

- Ben

> 
> -bw
> 
> On Feb 23, 2013, at 2:22 PM, Benjamin Kramer <benny.kra at gmail.com> wrote:
> 
>> 
>> On 15.02.2013, at 23:31, Bill Wendling <isanbard at gmail.com> wrote:
>> 
>>> Author: void
>>> Date: Fri Feb 15 16:31:27 2013
>>> New Revision: 175314
>>> 
>>> URL: http://llvm.org/viewvc/llvm-project?rev=175314&view=rev
>>> Log:
>>> Use the 'target-features' and 'target-cpu' attributes to reset the subtarget features.
>>> 
>>> If two functions require different features (e.g., `-mno-sse' vs. `-msse') then
>>> we want to honor that, especially during LTO. We can do that by resetting the
>>> subtarget's features depending upon the 'target-feature' attribute.
>> 
>> Something about this commit is incomplete, it looks like it's not reinitializing TLI's legality settings.
>> 
>> Take the attached testcase, it enables sse2 with the target-features attribute but doesn't compile with llc because sse2 suddenly went missing. It works when I remove the attribute.
>> 
>> $ llc < bugpoint-reduced-simplified.ll
>> 	.file	"<stdin>"
>> LLVM ERROR: Cannot select: 0x7f9fb383d510: v4i32 = mul 0x7f9fb383d410, 0x7f9fb3839810 [ID=12]
>> 0x7f9fb383d410: v4i32 = fp_to_sint 0x7f9fb383d110 [ID=11]
>>   0x7f9fb383d110: v4f32,ch = load 0x7f9fb34113e8, 0x7f9fb383d210, 0x7f9fb3839610<LD16[ConstantPool]> [ID=9]
>>     0x7f9fb383d210: i32 = X86ISD::Wrapper 0x7f9fb3839010 [ID=7]
>>       0x7f9fb3839010: i32 = TargetConstantPool<<4 x i32> <i32 1065353216, i32 1056964608, i32 1048576000, i32 1040187392>> 0 [ID=5]
>>     0x7f9fb3839610: i32 = undef [ID=3]
>> 0x7f9fb3839810: v4i32 = bitcast 0x7f9fb3839210 [ID=10]
>>   0x7f9fb3839210: v2i64,ch = load 0x7f9fb34113e8, 0x7f9fb383d010, 0x7f9fb3839610<LD16[ConstantPool]> [ID=8]
>>     0x7f9fb383d010: i32 = X86ISD::Wrapper 0x7f9fb383cf10 [ID=6]
>>       0x7f9fb383cf10: i32 = TargetConstantPool<<4 x i32> <i32 1, i32 1, i32 1, i32 1>> 0 [ID=4]
>>     0x7f9fb3839610: i32 = undef [ID=3]
>> In function: widen_bitfield
>> 
>> - Ben
>> 
>> <bugpoint-reduced-simplified.ll>
>>> 
>>> Modified:
>>>  llvm/trunk/include/llvm/Target/TargetSubtargetInfo.h
>>>  llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
>>>  llvm/trunk/lib/Target/X86/X86Subtarget.cpp
>>>  llvm/trunk/lib/Target/X86/X86Subtarget.h
>>> 
>>> Modified: llvm/trunk/include/llvm/Target/TargetSubtargetInfo.h
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetSubtargetInfo.h?rev=175314&r1=175313&r2=175314&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/include/llvm/Target/TargetSubtargetInfo.h (original)
>>> +++ llvm/trunk/include/llvm/Target/TargetSubtargetInfo.h Fri Feb 15 16:31:27 2013
>>> @@ -19,6 +19,7 @@
>>> 
>>> namespace llvm {
>>> 
>>> +class MachineFunction;
>>> class MachineInstr;
>>> class SDep;
>>> class SUnit;
>>> @@ -73,6 +74,9 @@ public:
>>> // the latency of a schedule dependency.
>>> virtual void adjustSchedDependency(SUnit *def, SUnit *use,
>>>                                    SDep& dep) const { }
>>> +
>>> +  /// \brief Reset the features for the subtarget.
>>> +  virtual void resetSubtargetFeatures(const MachineFunction *MF) { }
>>> };
>>> 
>>> } // End llvm namespace
>>> 
>>> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=175314&r1=175313&r2=175314&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
>>> +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Fri Feb 15 16:31:27 2013
>>> @@ -354,6 +354,10 @@ bool SelectionDAGISel::runOnMachineFunct
>>> TTI = getAnalysisIfAvailable<TargetTransformInfo>();
>>> GFI = Fn.hasGC() ? &getAnalysis<GCModuleInfo>().getFunctionInfo(Fn) : 0;
>>> 
>>> +  TargetSubtargetInfo &ST =
>>> +    const_cast<TargetSubtargetInfo&>(TM.getSubtarget<TargetSubtargetInfo>());
>>> +  ST.resetSubtargetFeatures(MF);
>>> +
>>> DEBUG(dbgs() << "\n\n\n=== " << Fn.getName() << "\n");
>>> 
>>> SplitCriticalSideEffectEdges(const_cast<Function&>(Fn), this);
>>> 
>>> Modified: llvm/trunk/lib/Target/X86/X86Subtarget.cpp
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.cpp?rev=175314&r1=175313&r2=175314&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/lib/Target/X86/X86Subtarget.cpp (original)
>>> +++ llvm/trunk/lib/Target/X86/X86Subtarget.cpp Fri Feb 15 16:31:27 2013
>>> @@ -14,6 +14,8 @@
>>> #define DEBUG_TYPE "subtarget"
>>> #include "X86Subtarget.h"
>>> #include "X86InstrInfo.h"
>>> +#include "llvm/IR/Attributes.h"
>>> +#include "llvm/IR/Function.h"
>>> #include "llvm/IR/GlobalValue.h"
>>> #include "llvm/Support/Debug.h"
>>> #include "llvm/Support/ErrorHandling.h"
>>> @@ -324,46 +326,21 @@ void X86Subtarget::AutoDetectSubtargetFe
>>> }
>>> }
>>> 
>>> -X86Subtarget::X86Subtarget(const std::string &TT, const std::string &CPU,
>>> -                           const std::string &FS,
>>> -                           unsigned StackAlignOverride, bool is64Bit)
>>> -  : X86GenSubtargetInfo(TT, CPU, FS)
>>> -  , X86ProcFamily(Others)
>>> -  , PICStyle(PICStyles::None)
>>> -  , X86SSELevel(NoMMXSSE)
>>> -  , X863DNowLevel(NoThreeDNow)
>>> -  , HasCMov(false)
>>> -  , HasX86_64(false)
>>> -  , HasPOPCNT(false)
>>> -  , HasSSE4A(false)
>>> -  , HasAES(false)
>>> -  , HasPCLMUL(false)
>>> -  , HasFMA(false)
>>> -  , HasFMA4(false)
>>> -  , HasXOP(false)
>>> -  , HasMOVBE(false)
>>> -  , HasRDRAND(false)
>>> -  , HasF16C(false)
>>> -  , HasFSGSBase(false)
>>> -  , HasLZCNT(false)
>>> -  , HasBMI(false)
>>> -  , HasBMI2(false)
>>> -  , HasRTM(false)
>>> -  , HasADX(false)
>>> -  , IsBTMemSlow(false)
>>> -  , IsUAMemFast(false)
>>> -  , HasVectorUAMem(false)
>>> -  , HasCmpxchg16b(false)
>>> -  , UseLeaForSP(false)
>>> -  , HasSlowDivide(false)
>>> -  , PostRAScheduler(false)
>>> -  , PadShortFunctions(false)
>>> -  , stackAlignment(4)
>>> -  // FIXME: this is a known good value for Yonah. How about others?
>>> -  , MaxInlineSizeThreshold(128)
>>> -  , TargetTriple(TT)
>>> -  , In64BitMode(is64Bit) {
>>> -  // Determine default and user specified characteristics
>>> +void X86Subtarget::resetSubtargetFeatures(const MachineFunction *MF) {
>>> +  AttributeSet FnAttrs = MF->getFunction()->getAttributes();
>>> +  Attribute CPUAttr = FnAttrs.getAttribute(AttributeSet::FunctionIndex,
>>> +                                           "target-cpu");
>>> +  Attribute FSAttr = FnAttrs.getAttribute(AttributeSet::FunctionIndex,
>>> +                                          "target-features");
>>> +  std::string CPU =
>>> +    !CPUAttr.hasAttribute(Attribute::None) ?CPUAttr.getValueAsString() : "";
>>> +  std::string FS =
>>> +    !FSAttr.hasAttribute(Attribute::None) ? FSAttr.getValueAsString() : "";
>>> +  if (!FS.empty())
>>> +    resetSubtargetFeatures(CPU, FS);
>>> +}
>>> +
>>> +void X86Subtarget::resetSubtargetFeatures(StringRef CPU, StringRef FS) {
>>> std::string CPUName = CPU;
>>> if (!FS.empty() || !CPU.empty()) {
>>>   if (CPUName.empty()) {
>>> @@ -440,6 +417,49 @@ X86Subtarget::X86Subtarget(const std::st
>>>   stackAlignment = 16;
>>> }
>>> 
>>> +X86Subtarget::X86Subtarget(const std::string &TT, const std::string &CPU,
>>> +                           const std::string &FS,
>>> +                           unsigned StackAlignOverride, bool is64Bit)
>>> +  : X86GenSubtargetInfo(TT, CPU, FS)
>>> +  , X86ProcFamily(Others)
>>> +  , PICStyle(PICStyles::None)
>>> +  , X86SSELevel(NoMMXSSE)
>>> +  , X863DNowLevel(NoThreeDNow)
>>> +  , HasCMov(false)
>>> +  , HasX86_64(false)
>>> +  , HasPOPCNT(false)
>>> +  , HasSSE4A(false)
>>> +  , HasAES(false)
>>> +  , HasPCLMUL(false)
>>> +  , HasFMA(false)
>>> +  , HasFMA4(false)
>>> +  , HasXOP(false)
>>> +  , HasMOVBE(false)
>>> +  , HasRDRAND(false)
>>> +  , HasF16C(false)
>>> +  , HasFSGSBase(false)
>>> +  , HasLZCNT(false)
>>> +  , HasBMI(false)
>>> +  , HasBMI2(false)
>>> +  , HasRTM(false)
>>> +  , HasADX(false)
>>> +  , IsBTMemSlow(false)
>>> +  , IsUAMemFast(false)
>>> +  , HasVectorUAMem(false)
>>> +  , HasCmpxchg16b(false)
>>> +  , UseLeaForSP(false)
>>> +  , HasSlowDivide(false)
>>> +  , PostRAScheduler(false)
>>> +  , PadShortFunctions(false)
>>> +  , stackAlignment(4)
>>> +  // FIXME: this is a known good value for Yonah. How about others?
>>> +  , MaxInlineSizeThreshold(128)
>>> +  , TargetTriple(TT)
>>> +  , StackAlignOverride(StackAlignOverride)
>>> +  , In64BitMode(is64Bit) {
>>> +  resetSubtargetFeatures(CPU, FS);
>>> +}
>>> +
>>> bool X86Subtarget::enablePostRAScheduler(
>>>          CodeGenOpt::Level OptLevel,
>>>          TargetSubtargetInfo::AntiDepBreakMode& Mode,
>>> 
>>> Modified: llvm/trunk/lib/Target/X86/X86Subtarget.h
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.h?rev=175314&r1=175313&r2=175314&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/lib/Target/X86/X86Subtarget.h (original)
>>> +++ llvm/trunk/lib/Target/X86/X86Subtarget.h Fri Feb 15 16:31:27 2013
>>> @@ -168,11 +168,13 @@ protected:
>>> InstrItineraryData InstrItins;
>>> 
>>> private:
>>> +  /// StackAlignOverride - Override the stack alignment.
>>> +  unsigned StackAlignOverride;
>>> +
>>> /// In64BitMode - True if compiling for 64-bit, false for 32-bit.
>>> bool In64BitMode;
>>> 
>>> public:
>>> -
>>> /// This constructor initializes the data members to match that
>>> /// of the specified triple.
>>> ///
>>> @@ -197,6 +199,10 @@ public:
>>> /// instruction.
>>> void AutoDetectSubtargetFeatures();
>>> 
>>> +  /// \brief Reset the features for the X86 target.
>>> +  virtual void resetSubtargetFeatures(const MachineFunction *MF);
>>> +  void resetSubtargetFeatures(StringRef CPU, StringRef FS);
>>> +
>>> /// Is this x86_64? (disregarding specific ABI / programming model)
>>> bool is64Bit() const {
>>>   return In64BitMode;
>>> 
>>> 
>>> _______________________________________________
>>> llvm-commits mailing list
>>> llvm-commits at cs.uiuc.edu
>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>> 
> 





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