[llvm] r175975 - Add new base instruction def for cmpi, cmp, slt and sltu so that def/uses

Reed Kotler rkotler at mips.com
Sat Feb 23 15:37:04 PST 2013


Author: rkotler
Date: Sat Feb 23 17:37:03 2013
New Revision: 175975

URL: http://llvm.org/viewvc/llvm-project?rev=175975&view=rev
Log:
Add new base instruction def for cmpi, cmp, slt and sltu so that def/uses
proper. Fixed this already a few days ago for slti.


Modified:
    llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td

Modified: llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td?rev=175975&r1=175974&r2=175975&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td Sat Feb 23 17:37:03 2013
@@ -283,6 +283,11 @@ class FRR16_ins<bits<5> f, string asmstr
         !strconcat(asmstr, "\t$rx, $ry"), [], itin> {
 }
 
+class FRR16R_ins<bits<5> f, string asmstr, InstrItinClass itin> :
+  FRR16<f, (outs), (ins  CPU16Regs:$rx, CPU16Regs:$ry),
+        !strconcat(asmstr, "\t$rx, $ry"), [], itin> {
+}
+
 class FRRTR16_ins<string asmstr> :
   MipsPseudo16<(outs CPU16Regs:$rz), (ins CPU16Regs:$rx, CPU16Regs:$ry),
                !strconcat(asmstr, "\t$rx, $ry\n\tmove\t$rz, $$t8"), []> ;
@@ -610,7 +615,7 @@ def BtnezT8SltiuX16: FEXT_T8I8I16_ins<"b
 // Purpose: Compare
 // To compare the contents of two GPRs.
 //
-def CmpRxRy16: FRR16_ins<0b01010, "cmp", IIAlu> {
+def CmpRxRy16: FRR16R_ins<0b01010, "cmp", IIAlu> {
   let Defs = [T8];
 }
 
@@ -619,7 +624,7 @@ def CmpRxRy16: FRR16_ins<0b01010, "cmp",
 // Purpose: Compare Immediate
 // To compare a constant with the contents of a GPR.
 //
-def CmpiRxImm16: FRI16_ins<0b01110, "cmpi", IIAlu> {
+def CmpiRxImm16: FRI16R_ins<0b01110, "cmpi", IIAlu> {
   let Defs = [T8];
 }
 
@@ -628,7 +633,7 @@ def CmpiRxImm16: FRI16_ins<0b01110, "cmp
 // Purpose: Compare Immediate (Extended)
 // To compare a constant with the contents of a GPR.
 //
-def CmpiRxImmX16: FEXT_RI16_ins<0b01110, "cmpi", IIAlu> {
+def CmpiRxImmX16: FEXT_RI16R_ins<0b01110, "cmpi", IIAlu> {
   let Defs = [T8];
 }
 
@@ -1110,7 +1115,7 @@ def SltiuCCRxImmX16: FEXT_CCRXI16_ins<"s
 // Purpose: Set on Less Than
 // To record the result of a less-than comparison.
 //
-def SltRxRy16: FRR16_ins<0b00010, "slt", IIAlu>{
+def SltRxRy16: FRR16R_ins<0b00010, "slt", IIAlu>{
   let Defs = [T8];
 }
 
@@ -1120,7 +1125,7 @@ def SltCCRxRy16: FCCRR16_ins<"slt">;
 // Purpose: Set on Less Than Unsigned
 // To record the result of an unsigned less-than comparison.
 //
-def SltuRxRy16: FRR16_ins<0b00011, "sltu", IIAlu>{
+def SltuRxRy16: FRR16R_ins<0b00011, "sltu", IIAlu>{
   let Defs = [T8];
 }
 





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