[llvm] r175688 - Kill of TransferDeadFlag - Dead copies and subreg-to-reg instructions should
Alexey Samsonov
samsonov at google.com
Fri Feb 22 00:55:18 PST 2013
On Fri, Feb 22, 2013 at 2:24 AM, Lang Hames <lhames at gmail.com> wrote:
> Hi Alexy, Duncan,
>
> I've reapplied this, with Jakob's suggested fix from PR15320, in r175809.
> I'll keep my eye out for build breakage, but I think this should fix the
> issue.
>
The fix works me now, thanks!
>
> Cheers,
> Lang.
>
>
> On Thu, Feb 21, 2013 at 9:07 AM, Lang Hames <lhames at gmail.com> wrote:
>
>> Hi Alexy, Duncan,
>>
>> Thanks for catching this. I've reverted it in r175765.
>>
>> The existing TransferDeadFlag code is broken - Targets are free to
>> replace copies and subreg-to-reg instructions with instructions that define
>> super-regs. In that case TransferDeadFlag will either crash, or (worse) may
>> tag an unrelated earlier definition as dead. I'll track down whatever is
>> wrong with this fix and re-apply.
>>
>> Cheers,
>> Lang.
>>
>>
>> On Thu, Feb 21, 2013 at 4:22 AM, Duncan Sands <baldrick at free.fr> wrote:
>>
>>> On 21/02/13 12:21, Alexey Samsonov wrote:
>>>
>>>> Hi, Lang!
>>>>
>>>> I think this is causing http://llvm.org/bugs/show_bug.**cgi?id=15320<http://llvm.org/bugs/show_bug.cgi?id=15320>.
>>>> Could you
>>>> please take a look?
>>>>
>>>
>>> Vast numbers of dragonegg buildbots are showing a miscompilation, and
>>> this
>>> commit is in the blame list... So I also ask you to please take a look!
>>>
>>> Ciao, Duncan.
>>>
>>>
>>>>
>>>> On Thu, Feb 21, 2013 at 3:36 AM, Lang Hames <lhames at gmail.com
>>>> <mailto:lhames at gmail.com>> wrote:
>>>>
>>>> Author: lhames
>>>> Date: Wed Feb 20 17:36:57 2013
>>>> New Revision: 175688
>>>>
>>>> URL: http://llvm.org/viewvc/llvm-**project?rev=175688&view=rev<http://llvm.org/viewvc/llvm-project?rev=175688&view=rev>
>>>> Log:
>>>> Kill of TransferDeadFlag - Dead copies and subreg-to-reg
>>>> instructions should
>>>> just be turned into kills on the spot.
>>>>
>>>>
>>>> Modified:
>>>> llvm/trunk/lib/CodeGen/**ExpandPostRAPseudos.cpp
>>>>
>>>> Modified: llvm/trunk/lib/CodeGen/**ExpandPostRAPseudos.cpp
>>>> URL:
>>>> http://llvm.org/viewvc/llvm-**project/llvm/trunk/lib/**
>>>> CodeGen/ExpandPostRAPseudos.**cpp?rev=175688&r1=175687&r2=**
>>>> 175688&view=diff<http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ExpandPostRAPseudos.cpp?rev=175688&r1=175687&r2=175688&view=diff>
>>>> ==============================**==============================**
>>>> ==================
>>>> --- llvm/trunk/lib/CodeGen/**ExpandPostRAPseudos.cpp (original)
>>>> +++ llvm/trunk/lib/CodeGen/**ExpandPostRAPseudos.cpp Wed Feb 20
>>>> 17:36:57 2013
>>>> @@ -49,8 +49,6 @@ private:
>>>> bool LowerSubregToReg(MachineInstr *MI);
>>>> bool LowerCopy(MachineInstr *MI);
>>>>
>>>> - void TransferDeadFlag(MachineInstr *MI, unsigned DstReg,
>>>> - const TargetRegisterInfo *TRI);
>>>> void TransferImplicitDefs(**MachineInstr *MI);
>>>> };
>>>> } // end anonymous namespace
>>>> @@ -61,21 +59,6 @@ char &llvm::ExpandPostRAPseudosID = Expa
>>>> INITIALIZE_PASS(ExpandPostRA, "postrapseudos",
>>>> "Post-RA pseudo instruction expansion pass",
>>>> false, false)
>>>>
>>>> -/// TransferDeadFlag - MI is a pseudo-instruction with DstReg dead,
>>>> -/// and the lowered replacement instructions immediately precede
>>>> it.
>>>> -/// Mark the replacement instructions with the dead flag.
>>>> -void
>>>> -ExpandPostRA::**TransferDeadFlag(MachineInstr *MI, unsigned
>>>> DstReg,
>>>> - const TargetRegisterInfo *TRI) {
>>>> - for (MachineBasicBlock::iterator MII =
>>>> - prior(MachineBasicBlock::**iterator(MI)); ; --MII) {
>>>> - if (MII->addRegisterDead(DstReg, TRI))
>>>> - break;
>>>> - assert(MII != MI->getParent()->begin() &&
>>>> - "copyPhysReg output doesn't reference destination
>>>> register!");
>>>> - }
>>>> -}
>>>> -
>>>> /// TransferImplicitDefs - MI is a pseudo-instruction, and the
>>>> lowered
>>>> /// replacement instructions immediately precede it. Copy any
>>>> implicit-def
>>>> /// operands from MI to the replacement instruction.
>>>> @@ -128,17 +111,17 @@ bool ExpandPostRA::**LowerSubregToReg(Mach
>>>> }
>>>> DEBUG(dbgs() << "subreg: eliminated!");
>>>> } else {
>>>> + if (MI->getOperand(0).isDead()) {
>>>> + MI->setDesc(TII->get(**TargetOpcode::KILL));
>>>> + DEBUG(dbgs() << "subreg: replaced by: " << *MI);
>>>> + return true;
>>>> + }
>>>> TII->copyPhysReg(*MBB, MI, MI->getDebugLoc(), DstSubReg,
>>>> InsReg,
>>>> MI->getOperand(2).isKill());
>>>> -
>>>> // Implicitly define DstReg for subsequent uses.
>>>> MachineBasicBlock::iterator CopyMI = MI;
>>>> --CopyMI;
>>>> CopyMI->addRegisterDefined(**DstReg);
>>>> -
>>>> - // Transfer the kill/dead flags, if needed.
>>>> - if (MI->getOperand(0).isDead())
>>>> - TransferDeadFlag(MI, DstSubReg, TRI);
>>>> DEBUG(dbgs() << "subreg: " << *CopyMI);
>>>> }
>>>>
>>>> @@ -151,11 +134,18 @@ bool ExpandPostRA::LowerCopy(**MachineInst
>>>> MachineOperand &DstMO = MI->getOperand(0);
>>>> MachineOperand &SrcMO = MI->getOperand(1);
>>>>
>>>> + if (DstMO.isDead()) {
>>>> + DEBUG(dbgs() << "dead copy: " << *MI);
>>>> + MI->setDesc(TII->get(**TargetOpcode::KILL));
>>>> + DEBUG(dbgs() << "replaced by: " << *MI);
>>>> + return true;
>>>> + }
>>>> +
>>>> if (SrcMO.getReg() == DstMO.getReg()) {
>>>> DEBUG(dbgs() << "identity copy: " << *MI);
>>>> // No need to insert an identity copy instruction, but
>>>> replace with a KILL
>>>> // if liveness is changed.
>>>> - if (DstMO.isDead() || SrcMO.isUndef() || MI->getNumOperands()
>>>> > 2) {
>>>> + if (SrcMO.isUndef() || MI->getNumOperands() > 2) {
>>>> // We must make sure the super-register gets killed.
>>>> Replace the
>>>> // instruction with KILL.
>>>> MI->setDesc(TII->get(**TargetOpcode::KILL));
>>>> @@ -171,8 +161,6 @@ bool ExpandPostRA::LowerCopy(**MachineInst
>>>> TII->copyPhysReg(*MI->**getParent(), MI, MI->getDebugLoc(),
>>>> DstMO.getReg(), SrcMO.getReg(),
>>>> SrcMO.isKill());
>>>>
>>>> - if (DstMO.isDead())
>>>> - TransferDeadFlag(MI, DstMO.getReg(), TRI);
>>>> if (MI->getNumOperands() > 2)
>>>> TransferImplicitDefs(MI);
>>>> DEBUG({
>>>>
>>>>
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>>>> >
>>>>
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>>>>
>>>>
>>>>
>>>>
>>>> --
>>>> Alexey Samsonov, MSK
>>>>
>>>>
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--
Alexey Samsonov, MSK
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