[PATCH] Improve performance of vector code on A15

[Quentin Colombet]

James,

Thanks for the modifications.

Generally speaking, the patch LGTM (but I'm not the code owner :)), just a couple of remarks that you may or may not want to address.

+bool A15SDOptimizer::runOnMachineFunction(MachineFunction &Fn) {
+  TII = static_cast<const ARMBaseInstrInfo*>(Fn.getTarget().getInstrInfo());

I think that the LLVM expected way for this type of cast is to use the llvm cast<> template.

A lot of your internal functions return a boolean and take a reference to a boolean as parameter. I think you can simplify the interface and code by just keeping the returned boolean.

E.g., instead of doing
+  bool DeleteMI = false;
+  if (LQR == MachineBasicBlock::LQR_Dead && !ImpUse) {
+    if (MI.getOpcode() == ARM::VMOVS) {
+      convertVMOVToVDUP(MI, DefReg, ImpDefReg, DeleteMI);
+      return DeleteMI;
+    }
+    addClobberingVDUP(MI, DefReg, ImpDefReg, DeleteMI);
+    return DeleteMI;
+  }

you can do:
+  if (LQR == MachineBasicBlock::LQR_Dead && !ImpUse)
+    if (MI.getOpcode() == ARM::VMOVS) {
+      return convertVMOVToVDUP(MI, DefReg, ImpDefReg);
+    addClobberingVDUP(MI, DefReg, ImpDefReg);
+    return false;
+  }

etc.

Cheers,
-Quentin

On Feb 21, 2013, at 10:53 AM, James Molloy <James.Molloy at arm.com> wrote:

> Hi Quentin,
> 
> 
>>> Maybe a stupid remark, looking at your patch, unless I miss
>>> something, if I choose to disable your pass, I don't get the
>>> previous behavior for CortexA15 as the
>>> createExecutionDependencyFixPass will be skipped.
>>> Is that intended/desirable?
> 
> You're entirely right, and that wasn't intended. Thanks for spotting
> this, I attach a version with this modified.
> 
> 
> Joey,
> 
>> Minor thing: You should be using a triple slash /// for documentation
>> (especially for A15SDOptimizer::runOnMachineInstruction), and
>> I think they have to go above the function.
> 
> It's intended to be a comment describing the inner workings of the
> algorithm, not documentation (how to use a module/algorithm). It's not
> even externally accessible as it's in an anonymous namespace.
> 
> But if you want me to, I can convert it to a doxygen comment.
> 
> Cheers,
> 
> James
> 
> On Thu, 2013-02-21 at 18:33 +0000, Quentin Colombet wrote:
>> Hi James,
>> 
>> 
>> Maybe a stupid remark, looking at your patch, unless I miss something,
>> if I choose to disable your pass, I don't get the previous behavior
>> for CortexA15 as the createExecutionDependencyFixPass will be skipped.
>> Is that intended/desirable?
>> 
>> -Quentin
>> 
>> On Feb 21, 2013, at 10:13 AM, James Molloy <James.Molloy at arm.com>
>> wrote:
>> 
>>> Hi,
>>> 
>>> Attached is a patch which improves performance of vector code on
>>> Cortex-A15.
>>> 
>>> Certain code sequences, where an S register is written but read as a
>>> D
>>> register, can execute slowly. This patch defines a pass which
>>> detects
>>> when SPRs are written but read as DPRs and inserts code sequences
>>> which,
>>> although nonobvious, make code run much quicker.
>>> 
>>> The second patch, implicit-ops.diff, fixes an unrelated bug with
>>> implicit defs/uses that happens to impact the A15 pass's efficiency.
>>> 
>>> Please review!
>>> 
>>> Cheers,
>>> 
>>> James
>>> 
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>> 
> 
> 
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