[PATCH 2/3] ARM cost model: Address computation in vector mem ops not free

[Arnold]

I has a compound effect on throughput if you can only issue three a cycle. So there will be an impact on four vs  one of them. This is what I am trying to capture at a high Level.

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On Feb 6, 2013, at 11:55 PM, Nadav Rotem <nrotem at apple.com> wrote:

> I am not sure that its worth modeling this because it only affects the latency and not the throughput of the machine. 
> 
> On Feb 5, 2013, at 3:33 PM, Arnold Schwaighofer <aschwaighofer at apple.com> wrote:
> 
>> Updated patch. We now add the cost of address computation as part of the memory instruction cost.
>> 
>> 
>> Thanks
>> 
>> <0001-ARM-cost-model-Address-computation-in-vector-mem-ops.patch>
>> 
>> On Feb 1, 2013, at 1:39 PM, Renato Golin <renato.golin at linaro.org> wrote:
>> 
>>> On 1 February 2013 18:07, Nadav Rotem <nrotem at apple.com> wrote:
>>>> The problem is that we decide on the kind of GEP to use only when we vectorize the load/stores.  This happens in vectorizeMemoryInstruction. I think that we need to fix this in LoopVectorizationCostModel::getInstructionCost in the load/store switch cases. We have code for checking if the load/store is wide or if it is scalarized.
>>> 
>>> Good point! Shouldn't be too hard, though.
>>> 
>>> cheers,
>>> --renato
> 
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