[llvm-commits] Fixing Bug 13662: paired register for inline asm with 64-bit data on ARM

[Jakob Stoklund Olesen]

On Jan 24, 2013, at 5:46 PM, "Weiming Zhao" <weimingz at codeaurora.org> wrote:

> Hi Jakob,
>  
> First, I’m really sorry for late repose. I was really busy on other parts of LLVM in the past few weeks.
>  
> CopyFromReg can’t take a Untyped VT because  ScheduleDAGRRList.cpp::GetCostForDef() expects MachineOpCode for Untyped node, while CopyFromReg is not a MachineOpCode:
>  
> static void GetCostForDef(…) {
>   MVT VT = RegDefPos.GetValue();
>  
>   // Special handling for untyped values.  These values can only come from
>   // the expansion of custom DAG-to-DAG patterns.
>   if (VT == MVT::Untyped) {
>     const SDNode *Node = RegDefPos.GetNode();
>     unsigned Opcode = Node->getMachineOpcode(); à CopyFromReg is not a MachineOpcode()
>  
> This is why I’m avoiding using CopyFromReg for Untyped.

I think it is fine to add support for untyped CopyFromReg nodes there. You can get the register class from the virtual source register, and otherwise handle it the same way REG_SEQUENCE is handled.

Please make that change in a separate patch.

/jakob

-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20130125/e16b7449/attachment.html>