[llvm-commits] [PATCH] improve ARM halt encoding

[JF Bastien]

The Thumb1 encoding is also valid in Thumb2, I therefore don't think this
is an issue.


On Wed, Jan 16, 2013 at 2:35 PM, Renato Golin Linaro <
renato.golin at linaro.org> wrote:

> Hi Bastien,
>
> You have accounted for both ARM and Thumb1, but not Thumb2, which has yet
> another representation for UDFs, and I'm not sure you can accommodate all
> three into one representation (since the immediate slots are on odd places).
>
> From (A8.8.247):
>
> * Encoding A1:
> *  1110 0111 1111 iiii iiii iiii 1111 iiii
> * Encoding T2:
> *  1111 0111 1111 iiii 1010 iiii iiii iiii
> * Encoding T1:
> *  1101 1110 iiii iiii
>
> cheers,
> --renato
>
>
>
>
> On 16 January 2013 20:46, JF Bastien <jfb at chromium.org> wrote:
>
>> I've attached a patch from PNaCl with changes the ARM halt encoding so
>> that it also looks like a halt in Thumb. This can catch bugs when executing
>> ARM code as Thumb, whether it be in the context of compiler/JIT bugs, or an
>> attacker trying to get validated ARM code to execute as Thumb (which is a
>> concern for PNaCl).
>>
>> Note that the instruction itself isn't changing (it's still UDF), only
>> the immediate.
>>
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>>
>
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