[llvm-commits] Fixing Bug 13662: paired register for inline asm with 64-bit data on ARM

Weiming Zhao weimingz at codeaurora.org
Thu Jan 3 12:03:02 PST 2013

Yes, I tried to use CopyToReg/CopyFromReg to enforce the order. The issue is
“Untyped” data type.

The REG_SEQUENCE and EXTRACT_SUBREG has to use “Untyped” data type. However,
CopyToReg/CopyFromReg doesn’t support such data type.


And I explicitly add a glue edge between the Extract_subreg and inline asm:

SDValue E0 = SDValue(CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG,

                           dl, MVT::i32, MVT::Glue, PairedReg,

                           CurDAG->getTargetConstant(ARM::gsub_0, MVT::i32),

                           Chain.getValue(1) è Guarantees that this node is
emitted after the linlineasm

                          ), 0);


In other words, this node has the same effect as CopyFromReg.


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The Linux Foundation


From: Jakob Stoklund Olesen [mailto:stoklund at 2pi.dk] 
Sent: Thursday, January 03, 2013 10:57 AM
To: weimingz at codeaurora.org
Cc: llvm-commits at cs.uiuc.edu; 'James Grosbach'; Evan Cheng
Subject: Re: [llvm-commits] Fixing Bug 13662: paired register for inline asm
with 64-bit data on ARM



On Dec 19, 2012, at 4:22 PM, Weiming Zhao <weimingz at codeaurora.org> wrote:

The change to InstrEmitter is to let it support ExtractSubReg / RegSequence
to be connected to RegisterNode and  CopyFrom node to be connected to a
SubReg SDNode.


Normally, ExtractSubReg/RegSequence are only connected to a SDValue, but for
inlineasem, we have to connect them to a VR.

Existing inlineasm just emits multiple 32bit-typed VRs, it doesn’t need
ExtractSubReg/RegSequence, so such scenarios are not encountered. 


Now, this issue is exposed . 

So my patch let it handle more cases. It should be safe.


It is important that you understand how data dependencies are modeled in
SelectionDAG. They must be represented by DAG edges, and RegisterSDNode
doesn't provide a DAG edge.


Calls and inline-asm nodes get their arguments from virtual or physical
registers via RegisterSDNode arguments, but that only works because those
registers are read or written by CopyToReg and/or CopyFromReg nodes that are
*glued* to the call/asm nodes. The DAG edges carrying the data dependencies
are provided by the CopyToReg / CopyFromReg nodes.


You can't simply allow REG_SEQUENCE and EXTRACT_SUBREG to operate on
RegisterSDNodes since there is no DAG edge providing the data dependency. It
would be completely unsafe to allow such DAG constructs.


It is also entirely unnecessary. You can feed your REG_SEQUENCE DAG edge
into the CopyToReg node that is glued to an inline-asm node, and you can
EXTRACT_SUBREG from a similarly glued CopyFromReg.




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