[llvm-commits] [PATCH] PPC32: Add mapping for darwin/gas modifier in elf object writer

[Kai]

Hi Hal!

Thanks for the hint to the test case. That was the information I needed. :-)

I attach the patch again, this time with a test.
A problem still remains: the PPC32 ELF write is really broken. The last 
line of the test checks for a wrong value (the right value is noted as a 
comment).
Root cause is that 64bit relocation types are created even in 32bit 
mode. I am unsure about the right strategy to fix this. E.g. we could 
map the MCSymbolRefExp inside PPCELFObjectWriter::getRelocTypeInner() to 
different relocation types depending on 32/64 bit mode.

Regards
Kai

On 02.01.2013 21:31, Hal Finkel wrote:
> ----- Original Message -----
>> From: "Hal Finkel" <hfinkel at anl.gov>
>> To: "Kai" <kai at redstar.de>
>> Cc: llvm-commits at cs.uiuc.edu
>> Sent: Wednesday, January 2, 2013 2:12:01 PM
>> Subject: Re: [llvm-commits] [PATCH] PPC32: Add mapping for darwin/gas modifier in elf object writer
>>
>> ----- Original Message -----
>>> From: "Kai" <kai at redstar.de>
>>> To: llvm-commits at cs.uiuc.edu
>>> Sent: Sunday, December 30, 2012 5:49:04 PM
>>> Subject: [llvm-commits] [PATCH] PPC32: Add mapping for darwin/gas
>>> modifier in elf object writer
>>>
>>> Hi!
>>>
>>> The VK_PPC_DARWIN_HA16/LO16 and :VK_PPC_GAS_HA16/LO16 modifier are
>>> not
>>> mapped in PPCELFObjectWriter.cpp. They should be mapped to
>>> R_PPC_ADDR16_HA and R_PPC_ADDR16_LO. The attached patch adds these
>>> mappings.
>>
>> Kai,
>>
>> The patch looks fine; I'd prefer that we have a test case. I think
>> that you can make use of the elf-dump utility to generate one; see,
>> for example, test/MC/PowerPC/ppc64-initial-cfa.ll
>
> Actually, test/MC/PowerPC/ppc64-relocs-01.ll may be a better example.
>
>   -Hal
>
>>
>> Thanks again,
>> Hal
>>
>>>
>>> Regards
>>>
>>> Kai
>>>
>>> _______________________________________________
>>> llvm-commits mailing list
>>> llvm-commits at cs.uiuc.edu
>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>>
>>
>> --
>> Hal Finkel
>> Postdoctoral Appointee
>> Leadership Computing Facility
>> Argonne National Laboratory
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>
>

-------------- next part --------------
diff --git a/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp b/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
index 7f4d9a2..cd925ad 100644
--- a/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
+++ b/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
@@ -99,6 +99,8 @@ unsigned PPCELFObjectWriter::getRelocTypeInner(const MCValue &Target,
       case MCSymbolRefExpr::VK_PPC_DTPREL16_HA:
         Type = ELF::R_PPC64_DTPREL16_HA;
         break;
+      case MCSymbolRefExpr::VK_PPC_DARWIN_HA16:
+      case MCSymbolRefExpr::VK_PPC_GAS_HA16:
       case MCSymbolRefExpr::VK_None:
         Type = ELF::R_PPC_ADDR16_HA;
 	break;
@@ -125,6 +127,8 @@ unsigned PPCELFObjectWriter::getRelocTypeInner(const MCValue &Target,
       case MCSymbolRefExpr::VK_PPC_DTPREL16_LO:
         Type = ELF::R_PPC64_DTPREL16_LO;
         break;
+      case MCSymbolRefExpr::VK_PPC_DARWIN_LO16:
+      case MCSymbolRefExpr::VK_PPC_GAS_LO16:
       case MCSymbolRefExpr::VK_None:
         Type = ELF::R_PPC_ADDR16_LO;
 	break;
diff --git a/test/MC/PowerPC/ppc32-reloc-01.ll b/test/MC/PowerPC/ppc32-reloc-01.ll
new file mode 100644
index 0000000..cfd976d
--- /dev/null
+++ b/test/MC/PowerPC/ppc32-reloc-01.ll
@@ -0,0 +1,27 @@
+;; RUN: llc -mtriple=powerpc-unknown-linux-gnu -O3 -code-model=small  \
+;; RUN:  -filetype=obj %s -o - | \
+;; RUN: elf-dump --dump-section-data | FileCheck %s
+
+ at _D2o11xi = global i32 0
+
+define fastcc i32 @_Dmain({ i32, { i32, i8* }* } %unnamed) {
+entry:
+  store i32 42, i32* @_D2o11xi
+  %tmp = load i32* @_D2o11xi
+  ret i32 0
+}
+
+;; The relocations in .rela.text are the load and store of @_D2o11xi
+;; (which is symbol 0x000006). The relocation type must be
+;; R_PPC_ADDR16_HA (0x06)  and R_PPC_ADDR16_LO (0x04).
+;; CHECK:       '.rela.text'
+;; CHECK:       Relocation 0
+;; CHECK-NEXT:  'r_offset',
+;; CHECK-NEXT:  'r_sym', 0x000006
+;; CHECK-NEXT:  'r_type', 0x06
+;; CHECK:       Relocation 1
+;; CHECK-NEXT:  'r_offset',
+;; CHECK-NEXT:  'r_sym', 0x000006
+;; CHECK-NEXT:  'r_type', 0x2f
+;; The line above is buggy. Value must be 0x04 = R_PPC_ADDR16_LO
+