[llvm-commits] [llvm] r171461 - in /llvm/trunk: lib/Target/X86/X86InstrArithmetic.td test/CodeGen/X86/early-ifcvt.ll

Michael Gottesman mgottesman at apple.com
Thu Jan 3 01:50:22 PST 2013


As we discussed on IRC looks like the problem had to do with the machine in question.

I am going to recommit assuming that the svn server comes back up before I need to go visit relatives (I am in the land of Milk/Honey/Bombs). If I do not have the opportunity feel free to recommit yourself/if you have not when I get back in a bit and the svn server is backup I will.

On Jan 3, 2013, at 10:23 AM, Craig Topper <craig.topper at gmail.com> wrote:

> What were the failure signatures? My change was basically reverting a change I made last week so I'm shocked that it caused any failures.
> 
> On Thu, Jan 3, 2013 at 12:20 AM, Michael Gottesman <mgottesman at apple.com> wrote:
> This commit breaks a bunch of tests on smooshlab clang-x86_64-darwin12-RA. Specifically:
> Clang :: Analysis/outofbound-notwork.c
> Clang :: Analysis/string-fail.c
> Clang :: CXX/basic/basic.lookup/basic.lookup.qual/p6-0x.cpp
> Clang :: CXX/basic/basic.lookup/basic.lookup.unqual/p15.cpp
> Clang :: CXX/dcl.dcl/dcl.spec/dcl.fct.spec/p4.cpp
> Clang :: CXX/dcl.dcl/dcl.spec/dcl.stc/p10.cpp
> Clang :: CXX/temp/temp.param/p14.cpp
> Clang :: CXX/temp/temp.res/temp.dep.res/temp.point/p1.cpp
> Clang :: CodeGen/2009-02-13-zerosize-union-field-ppc.c
> Clang :: CodeGen/blocks-2.c
> Clang :: CodeGen/libcalls-d.c
> Clang :: CodeGen/libcalls-ld.c
> Clang :: CodeGenCXX/conversion-function.cpp
> Clang :: CodeGenCXX/debug-info-limit-type.cpp
> Clang :: CodeGenCXX/inheriting-constructor.cpp
> Clang :: FixIt/fixit-errors.c
> Clang :: FixIt/fixit-pmem.cpp
> Clang :: Modules/namespaces.cpp
> Clang :: PCH/changed-files.c
> Clang :: PCH/pr4489.c
> Clang :: PCH/source-manager-stack.c
> Clang :: Parser/cxx-ambig-decl-expr-xfail.cpp
> Clang :: SemaCXX/switch-implicit-fallthrough-cxx98.cpp
> Clang :: SemaTemplate/instantiate-function-1.mm
> I would normally ask for a fix first but this broke a lot of tests. Reverted in r171466.
> 
> Michael
> 
> On Jan 3, 2013, at 8:40 AM, Craig Topper <craig.topper at gmail.com> wrote:
> 
>> Author: ctopper
>> Date: Thu Jan  3 00:40:20 2013
>> New Revision: 171461
>> 
>> URL: http://llvm.org/viewvc/llvm-project?rev=171461&view=rev
>> Log:
>> Mark DIV/IDIV instructions hasSideEffects=1 because they can trap when dividing by 0. This is needed to keep early if conversion from moving them across basic blocks.
>> 
>> Modified:
>>    llvm/trunk/lib/Target/X86/X86InstrArithmetic.td
>>    llvm/trunk/test/CodeGen/X86/early-ifcvt.ll
>> 
>> Modified: llvm/trunk/lib/Target/X86/X86InstrArithmetic.td
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrArithmetic.td?rev=171461&r1=171460&r2=171461&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/X86/X86InstrArithmetic.td (original)
>> +++ llvm/trunk/lib/Target/X86/X86InstrArithmetic.td Thu Jan  3 00:40:20 2013
>> @@ -266,7 +266,7 @@
>> 
>> 
>> // unsigned division/remainder
>> -let hasSideEffects = 0 in {
>> +let hasSideEffects = 1 in { // so that we don't speculatively execute
>> let Defs = [AL,EFLAGS,AX], Uses = [AX] in
>> def DIV8r  : I<0xF6, MRM6r, (outs),  (ins GR8:$src),    // AX/r8 = AL,AH
>>                "div{b}\t$src", [], IIC_DIV8_REG>;
>> 
>> Modified: llvm/trunk/test/CodeGen/X86/early-ifcvt.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/early-ifcvt.ll?rev=171461&r1=171460&r2=171461&view=diff
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/X86/early-ifcvt.ll (original)
>> +++ llvm/trunk/test/CodeGen/X86/early-ifcvt.ll Thu Jan  3 00:40:20 2013
>> @@ -142,3 +142,35 @@
>> }
>> 
>> declare void @BZ2_bz__AssertH__fail()
>> +
>> +
>> +; Make sure we don't speculate on div/idiv instructions
>> +; CHECK: test_idiv
>> +; CHECK-NOT: cmov
>> +define i32 @test_idiv(i32 %a, i32 %b) nounwind uwtable readnone ssp {
>> +  %1 = icmp eq i32 %b, 0
>> +  br i1 %1, label %4, label %2
>> +
>> +; <label>:2                                       ; preds = %0
>> +  %3 = sdiv i32 %a, %b
>> +  br label %4
>> +
>> +; <label>:4                                       ; preds = %0, %2
>> +  %5 = phi i32 [ %3, %2 ], [ %a, %0 ]
>> +  ret i32 %5
>> +}
>> +
>> +; CHECK: test_div
>> +; CHECK-NOT: cmov
>> +define i32 @test_div(i32 %a, i32 %b) nounwind uwtable readnone ssp {
>> +  %1 = icmp eq i32 %b, 0
>> +  br i1 %1, label %4, label %2
>> +
>> +; <label>:2                                       ; preds = %0
>> +  %3 = udiv i32 %a, %b
>> +  br label %4
>> +
>> +; <label>:4                                       ; preds = %0, %2
>> +  %5 = phi i32 [ %3, %2 ], [ %a, %0 ]
>> +  ret i32 %5
>> +}
>> 
>> 
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> 
> 
> 
> 
> -- 
> ~Craig

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