[llvm-commits] [llvm] r171064 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/vec_compare.ll

Benjamin Kramer benny.kra at googlemail.com
Tue Dec 25 05:09:09 PST 2012


Author: d0k
Date: Tue Dec 25 07:09:08 2012
New Revision: 171064

URL: http://llvm.org/viewvc/llvm-project?rev=171064&view=rev
Log:
X86: Shave off one shuffle from the pcmpeqq sequence for SSE2 by making use of and commutativity.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/test/CodeGen/X86/vec_compare.ll

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=171064&r1=171063&r2=171064&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Dec 25 07:09:08 2012
@@ -9173,7 +9173,7 @@
       return SDValue();
     if (Opc == X86ISD::PCMPEQ && !Subtarget->hasSSE41()) {
       // If pcmpeqq is missing but pcmpeqd is available synthesize pcmpeqq with
-      // pcmpeqd + 2 shuffles + pand.
+      // pcmpeqd + pshufd + pand.
       assert(Subtarget->hasSSE2() && !FlipSigns && "Don't know how to lower!");
 
       // First cast everything to the right type,
@@ -9184,11 +9184,9 @@
       SDValue Result = DAG.getNode(Opc, dl, MVT::v4i32, Op0, Op1);
 
       // Make sure the lower and upper halves are both all-ones.
-      const int Mask1[] = { 0, 0, 2, 2 };
-      SDValue S1 = DAG.getVectorShuffle(MVT::v4i32, dl, Result, Result, Mask1);
-      const int Mask2[] = { 1, 1, 3, 3 };
-      SDValue S2 = DAG.getVectorShuffle(MVT::v4i32, dl, Result, Result, Mask2);
-      Result = DAG.getNode(ISD::AND, dl, MVT::v4i32, S1, S2);
+      const int Mask[] = { 1, 0, 3, 2 };
+      SDValue Shuf = DAG.getVectorShuffle(MVT::v4i32, dl, Result, Result, Mask);
+      Result = DAG.getNode(ISD::AND, dl, MVT::v4i32, Result, Shuf);
 
       if (Invert)
         Result = DAG.getNOT(dl, Result, MVT::v4i32);

Modified: llvm/trunk/test/CodeGen/X86/vec_compare.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_compare.ll?rev=171064&r1=171063&r2=171064&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_compare.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_compare.ll Tue Dec 25 07:09:08 2012
@@ -45,8 +45,7 @@
 define <2 x i64> @test5(<2 x i64> %A, <2 x i64> %B) nounwind {
 ; CHECK: test5:
 ; CHECK: pcmpeqd
-; CHECK: pshufd $-11
-; CHECK: pshufd $-96
+; CHECK: pshufd $-79
 ; CHECK: pand
 ; CHECK: ret
 	%C = icmp eq <2 x i64> %A, %B
@@ -57,8 +56,7 @@
 define <2 x i64> @test6(<2 x i64> %A, <2 x i64> %B) nounwind {
 ; CHECK: test6:
 ; CHECK: pcmpeqd
-; CHECK: pshufd $-11
-; CHECK: pshufd $-96
+; CHECK: pshufd $-79
 ; CHECK: pand
 ; CHECK: pcmpeqd
 ; CHECK: pxor





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