[llvm-commits] [llvm] [PATCH] PowerPC: Fix Altivec multiply-add zero sign

Hal Finkel hfinkel at anl.gov
Thu Nov 29 11:37:33 PST 2012


----- Original Message -----
> From: "Adhemerval Zanella" <azanella at linux.vnet.ibm.com>
> To: llvm-commits at cs.uiuc.edu
> Sent: Thursday, November 29, 2012 12:33:01 PM
> Subject: [llvm-commits] [llvm] [PATCH] PowerPC: Fix Altivec multiply-add	zero sign
> 
> This patch fixes the Altivec addend construction for the fused
> multiply-add
> instruction (vmaddfp) to conform with IEEE to ensure the sign of a
> zero
> result with resulting product is -0.0.
> 
> The -0.0 vector addend to vmaddfp is generated by a creating a vector
> with full bits sets and then shifting each elements by 31-bits to the
> left, resulting in a vector of 0x80000000 (or -0.0 as float).
> 
> The 'buildvec_canonicalize.ll' was adjusted to reflect this change
> and
> the 'vec_mul.ll' was complemented with the float vector
> multiplication
> test.
> 
> Any tips, advices, comments? Ok to commit?

Generally looks good to me. One quick comment:

+; CHECK: VSPLTI:
+; CHECK: vsplti

I recommend writing this as:
+; CHECK: @VSPLTI
+; CHECK: vsplti

to make it clear that the first check is to match the function definition.

 -Hal

> 
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-- 
Hal Finkel
Postdoctoral Appointee
Leadership Computing Facility
Argonne National Laboratory



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