[llvm-commits] [llvm] r168025 - in /llvm/trunk: docs/LangRef.html include/llvm/Intrinsics.td lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp lib/Target/ARM/ARMISelLowering.cpp lib/Target/PowerPC/PPCISelLowering.cpp lib/Target/X86/X86ISelLowering.cpp
Eli Bendersky
eliben at google.com
Thu Nov 15 05:26:23 PST 2012
Does this have tests?
On Wed, Nov 14, 2012 at 10:51 PM, Craig Topper <craig.topper at gmail.com> wrote:
> Author: ctopper
> Date: Thu Nov 15 00:51:10 2012
> New Revision: 168025
>
> URL: http://llvm.org/viewvc/llvm-project?rev=168025&view=rev
> Log:
> Add llvm.ceil, llvm.trunc, llvm.rint, llvm.nearbyint intrinsics.
>
> Modified:
> llvm/trunk/docs/LangRef.html
> llvm/trunk/include/llvm/Intrinsics.td
> llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
> llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
> llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
> llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
>
> Modified: llvm/trunk/docs/LangRef.html
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/LangRef.html?rev=168025&r1=168024&r2=168025&view=diff
> ==============================================================================
> --- llvm/trunk/docs/LangRef.html (original)
> +++ llvm/trunk/docs/LangRef.html Thu Nov 15 00:51:10 2012
> @@ -260,6 +260,10 @@
> <li><a href="#int_fma">'<tt>llvm.fma.*</tt>' Intrinsic</a></li>
> <li><a href="#int_fabs">'<tt>llvm.fabs.*</tt>' Intrinsic</a></li>
> <li><a href="#int_floor">'<tt>llvm.floor.*</tt>' Intrinsic</a></li>
> + <li><a href="#int_ceil">'<tt>llvm.ceil.*</tt>' Intrinsic</a></li>
> + <li><a href="#int_trunc">'<tt>llvm.trunc.*</tt>' Intrinsic</a></li>
> + <li><a href="#int_rint">'<tt>llvm.rint.*</tt>' Intrinsic</a></li>
> + <li><a href="#int_nearbyint">'<tt>llvm.nearbyint.*</tt>' Intrinsic</a></li>
> </ol>
> </li>
> <li><a href="#int_manip">Bit Manipulation Intrinsics</a>
> @@ -7634,6 +7638,143 @@
>
> </div>
>
> +<!-- _______________________________________________________________________ -->
> +<h4>
> + <a name="int_ceil">'<tt>llvm.ceil.*</tt>' Intrinsic</a>
> +</h4>
> +
> +<div>
> +
> +<h5>Syntax:</h5>
> +<p>This is an overloaded intrinsic. You can use <tt>llvm.ceil</tt> on any
> + floating point or vector of floating point type. Not all targets support all
> + types however.</p>
> +
> +<pre>
> + declare float @llvm.ceil.f32(float %Val)
> + declare double @llvm.ceil.f64(double %Val)
> + declare x86_fp80 @llvm.ceil.f80(x86_fp80 %Val)
> + declare fp128 @llvm.ceil.f128(fp128 %Val)
> + declare ppc_fp128 @llvm.ceil.ppcf128(ppc_fp128 %Val)
> +</pre>
> +
> +<h5>Overview:</h5>
> +<p>The '<tt>llvm.ceil.*</tt>' intrinsics return the ceiling of
> + the operand.</p>
> +
> +<h5>Arguments:</h5>
> +<p>The argument and return value are floating point numbers of the same
> + type.</p>
> +
> +<h5>Semantics:</h5>
> +<p>This function returns the same values as the libm <tt>ceil</tt> functions
> + would, and handles error conditions in the same way.</p>
> +
> +</div>
> +
> +<!-- _______________________________________________________________________ -->
> +<h4>
> + <a name="int_trunc">'<tt>llvm.trunc.*</tt>' Intrinsic</a>
> +</h4>
> +
> +<div>
> +
> +<h5>Syntax:</h5>
> +<p>This is an overloaded intrinsic. You can use <tt>llvm.trunc</tt> on any
> + floating point or vector of floating point type. Not all targets support all
> + types however.</p>
> +
> +<pre>
> + declare float @llvm.trunc.f32(float %Val)
> + declare double @llvm.trunc.f64(double %Val)
> + declare x86_fp80 @llvm.trunc.f80(x86_fp80 %Val)
> + declare fp128 @llvm.trunc.f128(fp128 %Val)
> + declare ppc_fp128 @llvm.trunc.ppcf128(ppc_fp128 %Val)
> +</pre>
> +
> +<h5>Overview:</h5>
> +<p>The '<tt>llvm.trunc.*</tt>' intrinsics returns the operand rounded to the
> + nearest integer not larger in magnitude than the operand.</p>
> +
> +<h5>Arguments:</h5>
> +<p>The argument and return value are floating point numbers of the same
> + type.</p>
> +
> +<h5>Semantics:</h5>
> +<p>This function returns the same values as the libm <tt>trunc</tt> functions
> + would, and handles error conditions in the same way.</p>
> +
> +</div>
> +
> +<!-- _______________________________________________________________________ -->
> +<h4>
> + <a name="int_rint">'<tt>llvm.rint.*</tt>' Intrinsic</a>
> +</h4>
> +
> +<div>
> +
> +<h5>Syntax:</h5>
> +<p>This is an overloaded intrinsic. You can use <tt>llvm.rint</tt> on any
> + floating point or vector of floating point type. Not all targets support all
> + types however.</p>
> +
> +<pre>
> + declare float @llvm.rint.f32(float %Val)
> + declare double @llvm.rint.f64(double %Val)
> + declare x86_fp80 @llvm.rint.f80(x86_fp80 %Val)
> + declare fp128 @llvm.rint.f128(fp128 %Val)
> + declare ppc_fp128 @llvm.rint.ppcf128(ppc_fp128 %Val)
> +</pre>
> +
> +<h5>Overview:</h5>
> +<p>The '<tt>llvm.rint.*</tt>' intrinsics returns the operand rounded to the
> + nearest integer. It may raise an inexact floating-point exception if the
> + operand isn't an integer.</p>
> +
> +<h5>Arguments:</h5>
> +<p>The argument and return value are floating point numbers of the same
> + type.</p>
> +
> +<h5>Semantics:</h5>
> +<p>This function returns the same values as the libm <tt>rint</tt> functions
> + would, and handles error conditions in the same way.</p>
> +
> +</div>
> +
> +<!-- _______________________________________________________________________ -->
> +<h4>
> + <a name="int_nearbyint">'<tt>llvm.nearbyint.*</tt>' Intrinsic</a>
> +</h4>
> +
> +<div>
> +
> +<h5>Syntax:</h5>
> +<p>This is an overloaded intrinsic. You can use <tt>llvm.nearbyint</tt> on any
> + floating point or vector of floating point type. Not all targets support all
> + types however.</p>
> +
> +<pre>
> + declare float @llvm.nearbyint.f32(float %Val)
> + declare double @llvm.nearbyint.f64(double %Val)
> + declare x86_fp80 @llvm.nearbyint.f80(x86_fp80 %Val)
> + declare fp128 @llvm.nearbyint.f128(fp128 %Val)
> + declare ppc_fp128 @llvm.nearbyint.ppcf128(ppc_fp128 %Val)
> +</pre>
> +
> +<h5>Overview:</h5>
> +<p>The '<tt>llvm.nearbyint.*</tt>' intrinsics returns the operand rounded to the
> + nearest integer.</p>
> +
> +<h5>Arguments:</h5>
> +<p>The argument and return value are floating point numbers of the same
> + type.</p>
> +
> +<h5>Semantics:</h5>
> +<p>This function returns the same values as the libm <tt>nearbyint</tt>
> + functions would, and handles error conditions in the same way.</p>
> +
> +</div>
> +
> </div>
>
> <!-- ======================================================================= -->
>
> Modified: llvm/trunk/include/llvm/Intrinsics.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Intrinsics.td?rev=168025&r1=168024&r2=168025&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/Intrinsics.td (original)
> +++ llvm/trunk/include/llvm/Intrinsics.td Thu Nov 15 00:51:10 2012
> @@ -271,6 +271,10 @@
> def int_exp2 : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>]>;
> def int_fabs : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>]>;
> def int_floor : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>]>;
> + def int_ceil : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>]>;
> + def int_trunc : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>]>;
> + def int_rint : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>]>;
> + def int_nearbyint : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>]>;
> }
>
> let Properties = [IntrNoMem] in {
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=168025&r1=168024&r2=168025&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Thu Nov 15 00:51:10 2012
> @@ -4996,6 +4996,26 @@
> getValue(I.getArgOperand(0)).getValueType(),
> getValue(I.getArgOperand(0))));
> return 0;
> + case Intrinsic::ceil:
> + setValue(&I, DAG.getNode(ISD::FCEIL, dl,
> + getValue(I.getArgOperand(0)).getValueType(),
> + getValue(I.getArgOperand(0))));
> + return 0;
> + case Intrinsic::trunc:
> + setValue(&I, DAG.getNode(ISD::FTRUNC, dl,
> + getValue(I.getArgOperand(0)).getValueType(),
> + getValue(I.getArgOperand(0))));
> + return 0;
> + case Intrinsic::rint:
> + setValue(&I, DAG.getNode(ISD::FRINT, dl,
> + getValue(I.getArgOperand(0)).getValueType(),
> + getValue(I.getArgOperand(0))));
> + return 0;
> + case Intrinsic::nearbyint:
> + setValue(&I, DAG.getNode(ISD::FNEARBYINT, dl,
> + getValue(I.getArgOperand(0)).getValueType(),
> + getValue(I.getArgOperand(0))));
> + return 0;
> case Intrinsic::fma:
> setValue(&I, DAG.getNode(ISD::FMA, dl,
> getValue(I.getArgOperand(0)).getValueType(),
>
> Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=168025&r1=168024&r2=168025&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Thu Nov 15 00:51:10 2012
> @@ -515,6 +515,10 @@
> setOperationAction(ISD::FLOG10, MVT::v4f32, Expand);
> setOperationAction(ISD::FEXP, MVT::v4f32, Expand);
> setOperationAction(ISD::FEXP2, MVT::v4f32, Expand);
> + setOperationAction(ISD::FCEIL, MVT::v4f32, Expand);
> + setOperationAction(ISD::FTRUNC, MVT::v4f32, Expand);
> + setOperationAction(ISD::FRINT, MVT::v4f32, Expand);
> + setOperationAction(ISD::FNEARBYINT, MVT::v4f32, Expand);
> setOperationAction(ISD::FFLOOR, MVT::v4f32, Expand);
>
> // Neon does not support some operations on v1i64 and v2i64 types.
>
> Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=168025&r1=168024&r2=168025&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Thu Nov 15 00:51:10 2012
> @@ -348,6 +348,10 @@
> setOperationAction(ISD::FDIV, VT, Expand);
> setOperationAction(ISD::FNEG, VT, Expand);
> setOperationAction(ISD::FFLOOR, VT, Expand);
> + setOperationAction(ISD::FCEIL, VT, Expand);
> + setOperationAction(ISD::FTRUNC, VT, Expand);
> + setOperationAction(ISD::FRINT, VT, Expand);
> + setOperationAction(ISD::FNEARBYINT, VT, Expand);
> setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Expand);
> setOperationAction(ISD::INSERT_VECTOR_ELT, VT, Expand);
> setOperationAction(ISD::BUILD_VECTOR, VT, Expand);
>
> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=168025&r1=168024&r2=168025&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Nov 15 00:51:10 2012
> @@ -727,7 +727,7 @@
> // turn on ones that can be effectively codegen'd.
> for (int i = MVT::FIRST_VECTOR_VALUETYPE;
> i <= MVT::LAST_VECTOR_VALUETYPE; ++i) {
> - MVT::SimpleValueType VT = (MVT::SimpleValueType)i;
> + MVT VT = (MVT::SimpleValueType)i;
> setOperationAction(ISD::ADD , VT, Expand);
> setOperationAction(ISD::SUB , VT, Expand);
> setOperationAction(ISD::FADD, VT, Expand);
> @@ -755,6 +755,10 @@
> setOperationAction(ISD::FSQRT, VT, Expand);
> setOperationAction(ISD::FCOPYSIGN, VT, Expand);
> setOperationAction(ISD::FFLOOR, VT, Expand);
> + setOperationAction(ISD::FCEIL, VT, Expand);
> + setOperationAction(ISD::FTRUNC, VT, Expand);
> + setOperationAction(ISD::FRINT, VT, Expand);
> + setOperationAction(ISD::FNEARBYINT, VT, Expand);
> setOperationAction(ISD::SMUL_LOHI, VT, Expand);
> setOperationAction(ISD::UMUL_LOHI, VT, Expand);
> setOperationAction(ISD::SDIVREM, VT, Expand);
>
>
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