[llvm-commits] [llvm] r167480 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86ISelLowering.h test/Analysis/CostModel/X86/cast.ll test/Transforms/LoopVectorize/X86/cost-model.ll
Chris Lattner
clattner at apple.com
Tue Nov 6 15:28:11 PST 2012
On Nov 6, 2012, at 11:33 AM, Nadav Rotem <nrotem at apple.com> wrote:
> URL: http://llvm.org/viewvc/llvm-project?rev=167480&view=rev
> Log:
> Cost Model: add tables for some avx type-conversion hacks.
>
> Modified:
> llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
> llvm/trunk/lib/Target/X86/X86ISelLowering.h
> llvm/trunk/test/Analysis/CostModel/X86/cast.ll
> llvm/trunk/test/Transforms/LoopVectorize/X86/cost-model.ll
>
> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=167480&r1=167479&r2=167480&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
>
> +
> +int FindInConvertTable(const X86TypeConversionCostTblEntry *Tbl, unsigned len,
> + int ISD, MVT Dst, MVT Src) {
Can this be a static function?
-Chris
> + for (unsigned int i = 0; i < len; ++i)
> + if (Tbl[i].ISD == ISD && Tbl[i].Src == Src && Tbl[i].Dst == Dst)
> + return i;
> +
> + // Could not find an entry.
> + return -1;
> +}
> +
> unsigned
> X86VectorTargetTransformInfo::getArithmeticInstrCost(unsigned Opcode,
> Type *Ty) const {
> @@ -17535,8 +17552,7 @@
> int ISD = InstructionOpcodeToISD(Opcode);
> assert(ISD && "Invalid opcode");
>
> - const X86Subtarget &ST =
> - TLI->getTargetMachine().getSubtarget<X86Subtarget>();
> + const X86Subtarget &ST = TLI->getTargetMachine().getSubtarget<X86Subtarget>();
>
> static const X86CostTblEntry AVX1CostTable[] = {
> // We don't have to scalarize unsupported ops. We can issue two half-sized
> @@ -17647,5 +17663,45 @@
> return VectorTargetTransformImpl::getCmpSelInstrCost(Opcode, ValTy, CondTy);
> }
>
> +unsigned X86VectorTargetTransformInfo::getCastInstrCost(unsigned Opcode,
> + Type *Dst,
> + Type *Src) const {
> + int ISD = InstructionOpcodeToISD(Opcode);
> + assert(ISD && "Invalid opcode");
> +
> + EVT SrcTy = TLI->getValueType(Src);
> + EVT DstTy = TLI->getValueType(Dst);
>
> + if (!SrcTy.isSimple() || !DstTy.isSimple())
> + return VectorTargetTransformImpl::getCastInstrCost(Opcode, Dst, Src);
> +
> + const X86Subtarget &ST = TLI->getTargetMachine().getSubtarget<X86Subtarget>();
> +
> + static const X86TypeConversionCostTblEntry AVXConversionTbl[] = {
> + { ISD::SIGN_EXTEND, MVT::v8i32, MVT::v8i16, 1 },
> + { ISD::ZERO_EXTEND, MVT::v8i32, MVT::v8i16, 1 },
> + { ISD::SIGN_EXTEND, MVT::v4i64, MVT::v4i32, 1 },
> + { ISD::ZERO_EXTEND, MVT::v4i64, MVT::v4i32, 1 },
> + { ISD::TRUNCATE, MVT::v4i32, MVT::v4i64, 1 },
> + { ISD::TRUNCATE, MVT::v8i16, MVT::v8i32, 1 },
> + { ISD::SINT_TO_FP, MVT::v8f32, MVT::v8i8, 1 },
> + { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i8, 1 },
> + { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i8, 1 },
> + { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i8, 1 },
> + { ISD::FP_TO_SINT, MVT::v8i8, MVT::v8f32, 1 },
> + { ISD::FP_TO_SINT, MVT::v4i8, MVT::v4f32, 1 },
> + { ISD::ZERO_EXTEND, MVT::v8i32, MVT::v8i1, 6 },
> + { ISD::SIGN_EXTEND, MVT::v8i32, MVT::v8i1, 9 },
> + };
> +
> + if (ST.hasAVX()) {
> + int Idx = FindInConvertTable(AVXConversionTbl,
> + array_lengthof(AVXConversionTbl),
> + ISD, DstTy.getSimpleVT(), SrcTy.getSimpleVT());
> + if (Idx != -1)
> + return AVXConversionTbl[Idx].Cost;
> + }
> +
> + return VectorTargetTransformImpl::getCastInstrCost(Opcode, Dst, Src);
> +}
>
>
> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=167480&r1=167479&r2=167480&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original)
> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Tue Nov 6 13:33:53 2012
> @@ -960,6 +960,9 @@
>
> unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
> Type *CondTy) const;
> +
> + virtual unsigned getCastInstrCost(unsigned Opcode, Type *Dst,
> + Type *Src) const;
> };
> }
>
>
> Modified: llvm/trunk/test/Analysis/CostModel/X86/cast.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/CostModel/X86/cast.ll?rev=167480&r1=167479&r2=167480&view=diff
> ==============================================================================
> --- llvm/trunk/test/Analysis/CostModel/X86/cast.ll (original)
> +++ llvm/trunk/test/Analysis/CostModel/X86/cast.ll Tue Nov 6 13:33:53 2012
> @@ -32,3 +32,35 @@
> ret i32 undef
> }
>
> +define i32 @zext_sext(<8 x i1> %in) {
> + ;CHECK: cost of 6 {{.*}} zext
> + %Z = zext <8 x i1> %in to <8 x i32>
> + ;CHECK: cost of 9 {{.*}} sext
> + %S = sext <8 x i1> %in to <8 x i32>
> +
> + ;CHECK: cost of 1 {{.*}} sext
> + %A = sext <8 x i16> undef to <8 x i32>
> + ;CHECK: cost of 1 {{.*}} zext
> + %B = zext <8 x i16> undef to <8 x i32>
> + ;CHECK: cost of 1 {{.*}} sext
> + %C = sext <4 x i32> undef to <4 x i64>
> +
> + ;CHECK: cost of 1 {{.*}} zext
> + %D = zext <4 x i32> undef to <4 x i64>
> + ;CHECK: cost of 1 {{.*}} trunc
> +
> + %E = trunc <4 x i64> undef to <4 x i32>
> + ;CHECK: cost of 1 {{.*}} trunc
> + %F = trunc <8 x i32> undef to <8 x i16>
> +
> + ret i32 undef
> +}
> +
> +define i32 @masks(<8 x i1> %in) {
> + ;CHECK: cost of 6 {{.*}} zext
> + %Z = zext <8 x i1> %in to <8 x i32>
> + ;CHECK: cost of 9 {{.*}} sext
> + %S = sext <8 x i1> %in to <8 x i32>
> + ret i32 undef
> +}
> +
>
> Modified: llvm/trunk/test/Transforms/LoopVectorize/X86/cost-model.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/X86/cost-model.ll?rev=167480&r1=167479&r2=167480&view=diff
> ==============================================================================
> --- llvm/trunk/test/Transforms/LoopVectorize/X86/cost-model.ll (original)
> +++ llvm/trunk/test/Transforms/LoopVectorize/X86/cost-model.ll Tue Nov 6 13:33:53 2012
> @@ -9,7 +9,7 @@
> @a = common global [2048 x i32] zeroinitializer, align 16
>
> ;CHECK: cost_model_1
> -;CHECK-NOT: <4 x i32>
> +;CHECK: <4 x i32>
> ;CHECK: ret void
> define void @cost_model_1() nounwind uwtable noinline ssp {
> entry:
>
>
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