[llvm-commits] [PATCH] Support for PowerPC inline asm Z and y

Hal Finkel hfinkel at anl.gov
Mon Nov 5 10:19:43 PST 2012



----- Original Message -----
> From: "Eric Christopher" <echristo at gmail.com>
> To: "Bill Schmidt" <wschmidt at linux.vnet.ibm.com>
> Cc: "Hal Finkel" <hfinkel at anl.gov>, llvm-commits at cs.uiuc.edu
> Sent: Monday, November 5, 2012 10:59:24 AM
> Subject: Re: [llvm-commits] [PATCH] Support for PowerPC inline asm Z and y
> 
> 
> 
> 
> 
> 
> On Mon, Nov 5, 2012 at 8:44 AM, Bill Schmidt <
> wschmidt at linux.vnet.ibm.com > wrote:
> 
> 
> 
> 
> > In order to use the PPC64 lwbrx instruction, I've generally
> > followed the instructions here:
> > http://hardwarebug.org/2008/10/25/gcc-inline-asm-annoyance/
> > which requires supporting the following inline asm syntax:
> > asm ("lwbrx %0, %y1" : "=r"(v) : "Z"(*p));
> > 
> > Currently, neither the 'Z' constraint type nor the special 'y'
> > modifier are supported in the PowerPC backend. This patch adds
> > some rudimentary support. It treats 'Z' like any other memory
> > operand, and with 'y', adds r0 and then the register operand with
> > the memory reference. This will work with lwbrx, and a number of
> > other instructions, but I'm not sure if it is sufficiently
> > general.
> > 
> > Even if this is functionally correct, I assume it would be more
> > efficient for the backend to understand that 'Z' can directly take
> > a base and offset register, but I'm not sure how to do that.
> > 
> > Please review.
> 
> After checking with others, the consensus is that this approach
> appears
> to be your best option. The patch itself LGTM.
> 
> 
> LGTM as well. Thanks Hal!

r167388. Thanks!

 -Hal

> 
> 
> -eric
> 

-- 
Hal Finkel
Postdoctoral Appointee
Leadership Computing Facility
Argonne National Laboratory



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