[llvm-commits] [PATCH] Support for PowerPC inline asm Z and y

Bill Schmidt wschmidt at linux.vnet.ibm.com
Sun Nov 4 07:39:03 PST 2012


Hal, I'm checking with my GCC colleagues who know the constraints system
more deeply than I do.  I agree that it seems there should be a better
way to express the constraint to allow more flexibility of base/address
registers.  I'll let you know what I find out.

Bill

-- 
Bill Schmidt, Ph.D.
IBM Advance Toolchain for PowerLinux
IBM Linux Technology Center
wschmidt at us.ibm.com
wschmidt at linux.vnet.ibm.com


On Sat, 2012-11-03 at 22:39 -0500, Hal Finkel wrote:
> In order to use the PPC64 lwbrx instruction, I've generally followed the instructions here:
> http://hardwarebug.org/2008/10/25/gcc-inline-asm-annoyance/
> which requires supporting the following inline asm syntax:
> asm ("lwbrx %0, %y1" : "=r"(v) : "Z"(*p));
> 
> Currently, neither the 'Z' constraint type nor the special 'y' modifier are supported in the PowerPC backend. This patch adds some rudimentary support. It treats 'Z' like any other memory operand, and with 'y', adds r0 and then the register operand with the memory reference. This will work with lwbrx, and a number of other instructions, but I'm not sure if it is sufficiently general.
> 
> Even if this is functionally correct, I assume it would be more efficient for the backend to understand that 'Z' can directly take a base and offset register, but I'm not sure how to do that.
> 
> Please review.
> 
> Thanks again,
> Hal
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits




More information about the llvm-commits mailing list