[llvm-commits] [llvm] r165692 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/select_const.ll

NAKAMURA Takumi geek4civic at gmail.com
Wed Oct 10 19:02:05 PDT 2012


Author: chapuni
Date: Wed Oct 10 21:02:05 2012
New Revision: 165692

URL: http://llvm.org/viewvc/llvm-project?rev=165692&view=rev
Log:
Revert r165661, "Patch by Shuxin Yang <shuxin.llvm at gmail.com>."

It broke stage2 clang and test-suite/MultiSource/Benchmarks/mediabench/g721/g721encode.

Removed:
    llvm/trunk/test/CodeGen/X86/select_const.ll
Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=165692&r1=165691&r2=165692&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Oct 10 21:02:05 2012
@@ -14415,7 +14415,6 @@
       if (TrueC->getAPIntValue().ult(FalseC->getAPIntValue())) {
         CC = X86::GetOppositeBranchCondition(CC);
         std::swap(TrueC, FalseC);
-        std::swap(TrueOp, FalseOp);
       }
 
       // Optimize C ? 8 : 0 -> zext(setcc(C)) << 3.  Likewise for any pow2/0.
@@ -14498,45 +14497,6 @@
       }
     }
   }
-
-  // Handle these cases:
-  //   (select (x != c), e, c) -> select (x != c), e, x),
-  //   (select (x == c), c, e) -> select (x == c), x, e) 
-  // where the c is an integer constant, and the "select" is the combination 
-  // of CMOV and CMP.
-  //
-  // The rationale for this change is that the conditional-move from a constant
-  // needs two instructions, however, conditional-move from a register needs 
-  // only one instruction.
-  // 
-  // CAVEAT: By replacing a constant with a symbolic value, it may obscure 
-  //  some instruction-combining opportunities. This opt needs to be 
-  //  postponed as late as possible.
-  //
-  if (!DCI.isBeforeLegalize() && !DCI.isBeforeLegalizeOps()) {
-    // the DCI.xxxx conditions are provided to postpone the optimization as 
-    // late as possible.
-
-    ConstantSDNode *CmpAgainst = 0;
-    if ((Cond.getOpcode() == X86ISD::CMP || Cond.getOpcode() == X86ISD::SUB) && 
-        (CmpAgainst = dyn_cast<ConstantSDNode>(Cond.getOperand(1))) && 
-        dyn_cast<ConstantSDNode>(Cond.getOperand(0)) == 0) {
-
-      if (CC == X86::COND_NE && 
-          CmpAgainst == dyn_cast<ConstantSDNode>(FalseOp)) {
-        CC = X86::GetOppositeBranchCondition(CC);
-        std::swap(TrueOp, FalseOp);
-      }
-
-      if (CC == X86::COND_E && 
-          CmpAgainst == dyn_cast<ConstantSDNode>(TrueOp)) {
-        SDValue Ops[] = { FalseOp, Cond.getOperand(0), N->getOperand(2), Cond };
-        return DAG.getNode(X86ISD::CMOV, DL, N->getVTList (), Ops, 
-                           array_lengthof(Ops));
-      }
-    }
-  }
-
   return SDValue();
 }
 

Removed: llvm/trunk/test/CodeGen/X86/select_const.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/select_const.ll?rev=165691&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/select_const.ll (original)
+++ llvm/trunk/test/CodeGen/X86/select_const.ll (removed)
@@ -1,16 +0,0 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mcpu=corei7 | FileCheck %s
-
-define i64 @test1(i64 %x) nounwind {
-entry:
-  %cmp = icmp eq i64 %x, 2
-  %add = add i64 %x, 1
-  %retval.0 = select i1 %cmp, i64 2, i64 %add
-  ret i64 %retval.0
-
-; CHECK: test1:
-; CHECK: leaq 1(%rdi), %rax
-; CHECK: cmpq $2, %rdi
-; CHECK: cmoveq %rdi, %rax
-; CHECK: ret
-
-}





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