[llvm-commits] [RFC/Patch 1.5/2 V2] ppc64-elf-linux-abi mark IsCodeGenOnly for specific operands for tblgen

[Will Schmidt]

On Wed, 2012-10-03 at 18:05 -0500, Hal Finkel wrote:
> On Wed, 03 Oct 2012 17:09:13 -0500
> Will Schmidt <will_schmidt at vnet.ibm.com> wrote:
> 
> > subj: [RFC/Patch 1.5/2 V2 ] ppc64-elf-linux-abi Add instruction tokens
> > for tblgen 
> > 
> > Slightly reworked per request. This content is broken out from the
> > Sep14 patch "Add Instruction tokens for tblgen".  
> > 
> > - Mark the BCC and BLR defs as isCodeGenOnly per error output from
> > llvm-tblgen -gen-asm-matcher.
> 
> Do we want to mark BCC as isCodeGenOnly, or do we want to mark the
> more-specialized mnemonics as isCodeGenOnly? If BCC is the most generic
> form, are there aliases for all other forms, and if there are, do we
> want separate instruction entries for all of them?

I've looked a bit, and I don't see anywhere that BCC is used as a basis
for other mnemonics. At least, not in the .td files.

The tblgen output does call out the "'${cond:cc}'" operand modifier as
not supported, which seems to be unique to the BCC def.  

tblgen specifically reports 
Included from PowerPC/PPC.td:68:
PowerPC//PPCInstrInfo.td:444:5: error: matchable with operand modifier '${cond:cc}' not supported by asm matcher.  Mark isCodeGenOnly!
    def BCC : BForm<16, 0, 0, (outs), (ins pred:$cond, condbrtarget:$dst),
    ^


Thanks for feedback,
-Will

> 
> Thanks again,
> Hal
> 
> > 
> > This change should not affect the current behavior of the build, and
> > should be safe to commit after part 1/2.
> > 
> > Thanks, 
> > -Will
> > 
> > 
> 
> 
>