[llvm-commits] [llvm] r165173 - in /llvm/trunk: lib/Target/X86/X86AsmPrinter.cpp lib/Target/X86/X86AsmPrinter.h test/CodeGen/X86/ms-inline-asm.ll

[Jim Grosbach]

Yep, the inline asm operand formatting is still separate from the normal MCInstPrinter stuff.

This looks great. Props for the explicit test case, too.

-Jim

On Oct 3, 2012, at 3:06 PM, Chad Rosier <mcrosier at apple.com> wrote:

> Author: mcrosier
> Date: Wed Oct  3 17:06:44 2012
> New Revision: 165173
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=165173&view=rev
> Log:
> [ms-inline asm] Add support in the X86AsmPrinter for printing memory references
> in the Intel syntax.
> 
> The MC layer supports emitting in the Intel syntax, but this would require the
> inline assembly MachineInstr to be lowered to an MCInst before emission.  This
> is potential future work, but for now emitting directly from the MachineInstr
> suffices.
> 
> Modified:
>    llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp
>    llvm/trunk/lib/Target/X86/X86AsmPrinter.h
>    llvm/trunk/test/CodeGen/X86/ms-inline-asm.ll
> 
> Modified: llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp?rev=165173&r1=165172&r2=165173&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp Wed Oct  3 17:06:44 2012
> @@ -365,6 +365,53 @@
>   printLeaMemReference(MI, Op, O, Modifier);
> }
> 
> +void X86AsmPrinter::printIntelMemReference(const MachineInstr *MI, unsigned Op,
> +                                           raw_ostream &O, const char *Modifier,
> +                                           unsigned AsmVariant){
> +  const MachineOperand &BaseReg  = MI->getOperand(Op);
> +  unsigned ScaleVal = MI->getOperand(Op+1).getImm();
> +  const MachineOperand &IndexReg = MI->getOperand(Op+2);
> +  const MachineOperand &DispSpec = MI->getOperand(Op+3);
> +  const MachineOperand &SegReg   = MI->getOperand(Op+4);
> +  
> +  // If this has a segment register, print it.
> +  if (SegReg.getReg()) {
> +    printOperand(MI, Op+4, O, Modifier, AsmVariant);
> +    O << ':';
> +  }
> +  
> +  O << '[';
> +  
> +  bool NeedPlus = false;
> +  if (BaseReg.getReg()) {
> +    printOperand(MI, Op, O, Modifier, AsmVariant);
> +    NeedPlus = true;
> +  }
> +  
> +  if (IndexReg.getReg()) {
> +    if (NeedPlus) O << " + ";
> +    if (ScaleVal != 1)
> +      O << ScaleVal << '*';
> +    printOperand(MI, Op+2, O, Modifier, AsmVariant);
> +    NeedPlus = true;
> +  }
> +
> +  assert (DispSpec.isImm() && "Displacement is not an immediate!");
> +  int64_t DispVal = DispSpec.getImm();
> +  if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg())) {
> +    if (NeedPlus) {
> +      if (DispVal > 0)
> +        O << " + ";
> +      else {
> +        O << " - ";
> +        DispVal = -DispVal;
> +      }
> +    }
> +    O << DispVal;
> +  }  
> +  O << ']';
> +}
> +
> void X86AsmPrinter::printPICLabel(const MachineInstr *MI, unsigned Op,
>                                   raw_ostream &O) {
>   O << *MF->getPICBaseSymbol() << '\n';
> @@ -481,6 +528,11 @@
>                                           unsigned OpNo, unsigned AsmVariant,
>                                           const char *ExtraCode,
>                                           raw_ostream &O) {
> +  if (AsmVariant) {
> +    printIntelMemReference(MI, OpNo, O);
> +    return false;
> +  }
> +
>   if (ExtraCode && ExtraCode[0]) {
>     if (ExtraCode[1] != 0) return true; // Unknown modifier.
> 
> 
> Modified: llvm/trunk/lib/Target/X86/X86AsmPrinter.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86AsmPrinter.h?rev=165173&r1=165172&r2=165173&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86AsmPrinter.h (original)
> +++ llvm/trunk/lib/Target/X86/X86AsmPrinter.h Wed Oct  3 17:06:44 2012
> @@ -70,6 +70,10 @@
> 
>   void printPICLabel(const MachineInstr *MI, unsigned Op, raw_ostream &O);
> 
> +  void printIntelMemReference(const MachineInstr *MI, unsigned Op,
> +                              raw_ostream &O, const char *Modifier=NULL,
> +                              unsigned AsmVariant = 1);                         
> +
>   bool runOnMachineFunction(MachineFunction &F);
> 
>   void PrintDebugValueComment(const MachineInstr *MI, raw_ostream &OS);
> 
> Modified: llvm/trunk/test/CodeGen/X86/ms-inline-asm.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/ms-inline-asm.ll?rev=165173&r1=165172&r2=165173&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/ms-inline-asm.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/ms-inline-asm.ll Wed Oct  3 17:06:44 2012
> @@ -24,3 +24,17 @@
> ; CHECK: .att_syntax
> ; CHECK: {{## InlineAsm End|#NO_APP}}
> }
> +
> +define void @t3(i32 %V) nounwind {
> +entry:
> +  %V.addr = alloca i32, align 4
> +  store i32 %V, i32* %V.addr, align 4
> +  call void asm sideeffect inteldialect "mov eax, DWORD PTR [$0]", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %V.addr) nounwind
> +  ret void
> +; CHECK: t3
> +; CHECK: {{## InlineAsm Start|#APP}}
> +; CHECK: .intel_syntax
> +; CHECK: mov eax, DWORD PTR {{[[esp]}}
> +; CHECK: .att_syntax
> +; CHECK: {{## InlineAsm End|#NO_APP}}
> +}
> 
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits