[llvm-commits] [llvm] r165067 - in /llvm/trunk/lib/Target/Mips: CMakeLists.txt MCTargetDesc/CMakeLists.txt MCTargetDesc/MipsDirectObjLower.cpp MCTargetDesc/MipsDirectObjLower.h MCTargetDesc/MipsMCCodeEmitter.cpp MipsAsmPrinter.cpp MipsDirectObjLower.cpp MipsDirectObjLower.h
Jack Carter
jcarter at mips.com
Tue Oct 2 16:09:40 PDT 2012
Author: jacksprat
Date: Tue Oct 2 18:09:40 2012
New Revision: 165067
URL: http://llvm.org/viewvc/llvm-project?rev=165067&view=rev
Log:
The mips 64bit instructions DSLL, DSRA, DSRL, DEXT and DINS get transformed by the assembler or through codegen direct object output to other variants based on the value of the immediate values of the operands.
If the code is generated as assembler, this transformation does not occur assuming that it will occur later in the assembler.
This code was originally called from MipsAsmPrinter.cpp and we needed to check for OutStreamer.hasRawTextSupport(). This was not a good place for it and has been moved to MCTargetDesc/MipsMCCodeEmitter.cpp where both direct object and the assembler use it it automagically.
The test cases have been checked in for a number of weeks now.
Added:
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsDirectObjLower.cpp
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsDirectObjLower.h
Removed:
llvm/trunk/lib/Target/Mips/MipsDirectObjLower.cpp
llvm/trunk/lib/Target/Mips/MipsDirectObjLower.h
Modified:
llvm/trunk/lib/Target/Mips/CMakeLists.txt
llvm/trunk/lib/Target/Mips/MCTargetDesc/CMakeLists.txt
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp
Modified: llvm/trunk/lib/Target/Mips/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/CMakeLists.txt?rev=165067&r1=165066&r2=165067&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/CMakeLists.txt (original)
+++ llvm/trunk/lib/Target/Mips/CMakeLists.txt Tue Oct 2 18:09:40 2012
@@ -22,7 +22,6 @@
MipsAsmPrinter.cpp
MipsCodeEmitter.cpp
MipsDelaySlotFiller.cpp
- MipsDirectObjLower.cpp
MipsELFWriterInfo.cpp
MipsJITInfo.cpp
MipsInstrInfo.cpp
Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/CMakeLists.txt?rev=165067&r1=165066&r2=165067&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/CMakeLists.txt (original)
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/CMakeLists.txt Tue Oct 2 18:09:40 2012
@@ -1,5 +1,6 @@
add_llvm_library(LLVMMipsDesc
MipsAsmBackend.cpp
+ MipsDirectObjLower.cpp
MipsMCAsmInfo.cpp
MipsMCCodeEmitter.cpp
MipsMCTargetDesc.cpp
Added: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsDirectObjLower.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsDirectObjLower.cpp?rev=165067&view=auto
==============================================================================
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsDirectObjLower.cpp (added)
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsDirectObjLower.cpp Tue Oct 2 18:09:40 2012
@@ -0,0 +1,81 @@
+//===-- MipsDirectObjLower.cpp - Mips LLVM direct object lowering -----===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file contains code to lower Mips MCInst records that are normally
+// left to the assembler to lower such as large shifts.
+//
+//===----------------------------------------------------------------------===//
+#include "MipsInstrInfo.h"
+#include "MCTargetDesc/MipsDirectObjLower.h"
+#include "llvm/MC/MCInst.h"
+#include "llvm/MC/MCStreamer.h"
+
+using namespace llvm;
+
+// If the D<shift> instruction has a shift amount that is greater
+// than 31 (checked in calling routine), lower it to a D<shift>32 instruction
+void Mips::LowerLargeShift(MCInst& Inst) {
+
+ assert(Inst.getNumOperands() == 3 && "Invalid no. of operands for shift!");
+ assert(Inst.getOperand(2).isImm());
+
+ int64_t Shift = Inst.getOperand(2).getImm();
+ if (Shift <= 31)
+ return; // Do nothing
+ Shift -= 32;
+
+ // saminus32
+ Inst.getOperand(2).setImm(Shift);
+
+ switch (Inst.getOpcode()) {
+ default:
+ // Calling function is not synchronized
+ llvm_unreachable("Unexpected shift instruction");
+ case Mips::DSLL:
+ Inst.setOpcode(Mips::DSLL32);
+ return;
+ case Mips::DSRL:
+ Inst.setOpcode(Mips::DSRL32);
+ return;
+ case Mips::DSRA:
+ Inst.setOpcode(Mips::DSRA32);
+ return;
+ }
+}
+
+// Pick a DEXT or DINS instruction variant based on the pos and size operands
+void Mips::LowerDextDins(MCInst& InstIn) {
+ int Opcode = InstIn.getOpcode();
+
+ if (Opcode == Mips::DEXT)
+ assert(InstIn.getNumOperands() == 4 &&
+ "Invalid no. of machine operands for DEXT!");
+ else // Only DEXT and DINS are possible
+ assert(InstIn.getNumOperands() == 5 &&
+ "Invalid no. of machine operands for DINS!");
+
+ assert(InstIn.getOperand(2).isImm());
+ int64_t pos = InstIn.getOperand(2).getImm();
+ assert(InstIn.getOperand(3).isImm());
+ int64_t size = InstIn.getOperand(3).getImm();
+
+ if (size <= 32) {
+ if (pos < 32) // DEXT/DINS, do nothing
+ return;
+ // DEXTU/DINSU
+ InstIn.getOperand(2).setImm(pos - 32);
+ InstIn.setOpcode((Opcode == Mips::DEXT) ? Mips::DEXTU : Mips::DINSU);
+ return;
+ }
+ // DEXTM/DINSM
+ assert(pos < 32 && "DEXT/DINS cannot have both size and pos > 32");
+ InstIn.getOperand(3).setImm(size - 32);
+ InstIn.setOpcode((Opcode == Mips::DEXT) ? Mips::DEXTM : Mips::DINSM);
+ return;
+}
Added: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsDirectObjLower.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsDirectObjLower.h?rev=165067&view=auto
==============================================================================
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsDirectObjLower.h (added)
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsDirectObjLower.h Tue Oct 2 18:09:40 2012
@@ -0,0 +1,28 @@
+//===-- MipsDirectObjLower.h - Mips LLVM direct object lowering *- C++ -*--===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef MIPSDIRECTOBJLOWER_H
+#define MIPSDIRECTOBJLOWER_H
+#include "llvm/ADT/SmallVector.h"
+#include "llvm/Support/Compiler.h"
+
+namespace llvm {
+ class MCInst;
+ class MCStreamer;
+
+ namespace Mips {
+ /// MipsDirectObjLower - This name space is used to lower MCInstr in cases
+ // where the assembler usually finishes the lowering
+ // such as large shifts.
+ void LowerLargeShift(MCInst &Inst);
+ void LowerDextDins(MCInst &Inst);
+ }
+}
+
+#endif
Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp?rev=165067&r1=165066&r2=165067&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp Tue Oct 2 18:09:40 2012
@@ -13,6 +13,7 @@
//
#define DEBUG_TYPE "mccodeemitter"
#include "MCTargetDesc/MipsBaseInfo.h"
+#include "MCTargetDesc/MipsDirectObjLower.h"
#include "MCTargetDesc/MipsFixupKinds.h"
#include "MCTargetDesc/MipsMCTargetDesc.h"
#include "llvm/ADT/APFloat.h"
@@ -109,16 +110,35 @@
EncodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups) const
{
- uint32_t Binary = getBinaryCodeForInstr(MI, Fixups);
+
+ // Non-pseudo instructions that get changed for direct object
+ // only based on operand values.
+ // If this list of instructions get much longer we will move
+ // the check to a function call. Until then, this is more efficient.
+ MCInst TmpInst = MI;
+ switch (MI.getOpcode()) {
+ // If shift amount is >= 32 it the inst needs to be lowered further
+ case Mips::DSLL:
+ case Mips::DSRL:
+ case Mips::DSRA:
+ Mips::LowerLargeShift(TmpInst);
+ break;
+ // Double extract instruction is chosen by pos and size operands
+ case Mips::DEXT:
+ case Mips::DINS:
+ Mips::LowerDextDins(TmpInst);
+ }
+
+ uint32_t Binary = getBinaryCodeForInstr(TmpInst, Fixups);
// Check for unimplemented opcodes.
- // Unfortunately in MIPS both NOT and SLL will come in with Binary == 0
+ // Unfortunately in MIPS both NOP and SLL will come in with Binary == 0
// so we have to special check for them.
- unsigned Opcode = MI.getOpcode();
+ unsigned Opcode = TmpInst.getOpcode();
if ((Opcode != Mips::NOP) && (Opcode != Mips::SLL) && !Binary)
llvm_unreachable("unimplemented opcode in EncodeInstruction()");
- const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
+ const MCInstrDesc &Desc = MCII.get(TmpInst.getOpcode());
uint64_t TSFlags = Desc.TSFlags;
// Pseudo instructions don't get encoded and shouldn't be here
Modified: llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp?rev=165067&r1=165066&r2=165067&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp Tue Oct 2 18:09:40 2012
@@ -15,7 +15,6 @@
#define DEBUG_TYPE "mips-asm-printer"
#include "Mips.h"
#include "MipsAsmPrinter.h"
-#include "MipsDirectObjLower.h"
#include "MipsInstrInfo.h"
#include "MipsMCInstLower.h"
#include "InstPrinter/MipsInstPrinter.h"
@@ -77,22 +76,6 @@
MCInst TmpInst0;
MCInstLowering.Lower(I++, TmpInst0);
- // Direct object specific instruction lowering
- if (!OutStreamer.hasRawTextSupport()){
- switch (TmpInst0.getOpcode()) {
- // If shift amount is >= 32 it the inst needs to be lowered further
- case Mips::DSLL:
- case Mips::DSRL:
- case Mips::DSRA:
- Mips::LowerLargeShift(TmpInst0);
- break;
- // Double extract instruction is chosen by pos and size operands
- case Mips::DEXT:
- case Mips::DINS:
- Mips::LowerDextDins(TmpInst0);
- }
- }
-
OutStreamer.EmitInstruction(TmpInst0);
} while ((I != E) && I->isInsideBundle()); // Delay slot check
}
Removed: llvm/trunk/lib/Target/Mips/MipsDirectObjLower.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsDirectObjLower.cpp?rev=165066&view=auto
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsDirectObjLower.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsDirectObjLower.cpp (removed)
@@ -1,86 +0,0 @@
-//===-- MipsDirectObjLower.cpp - Mips LLVM direct object lowering -----===//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file contains code to lower Mips MCInst records that are normally
-// left to the assembler to lower such as large shifts.
-//
-//===----------------------------------------------------------------------===//
-#include "MipsDirectObjLower.h"
-#include "MipsInstrInfo.h"
-#include "llvm/MC/MCInst.h"
-#include "llvm/MC/MCStreamer.h"
-
-using namespace llvm;
-
-// If the D<shift> instruction has a shift amount that is greater
-// than 31 (checked in calling routine), lower it to a D<shift>32 instruction
-void Mips::LowerLargeShift(MCInst& Inst) {
-
- assert(Inst.getNumOperands() == 3 && "Invalid no. of operands for shift!");
- assert(Inst.getOperand(2).isImm());
-
- bool isLarge = false;
- int64_t Shift;
- Shift = Inst.getOperand(2).getImm();
- if (Shift > 31) {
- Shift -= 32;
- isLarge = true;
- }
-
- // saminus32
- (Inst.getOperand(2)).setImm(Shift);
-
- if (isLarge)
- switch (Inst.getOpcode()) {
- default:
- // Calling function is not synchronized
- llvm_unreachable("Unexpected shift instruction");
- case Mips::DSLL:
- Inst.setOpcode(Mips::DSLL32);
- return;
- case Mips::DSRL:
- Inst.setOpcode(Mips::DSRL32);
- return;
- case Mips::DSRA:
- Inst.setOpcode(Mips::DSRA32);
- return;
- }
-}
-
-// Pick a DEXT or DINS instruction variant based on the pos and size operands
-void Mips::LowerDextDins(MCInst& InstIn) {
- int Opcode = InstIn.getOpcode();
-
- if (Opcode == Mips::DEXT)
- assert(InstIn.getNumOperands() == 4 &&
- "Invalid no. of machine operands for DEXT!");
- else // Only DEXT and DINS are possible
- assert(InstIn.getNumOperands() == 5 &&
- "Invalid no. of machine operands for DINS!");
-
- assert(InstIn.getOperand(2).isImm());
- int64_t pos = InstIn.getOperand(2).getImm();
- assert(InstIn.getOperand(3).isImm());
- int64_t size = InstIn.getOperand(3).getImm();
-
- if (size <= 32) {
- if ((pos < 32)) { // DEXT/DINS, do nothing
- return;
- } else { // DEXTU/DINSU
- InstIn.getOperand(2).setImm(pos - 32);
- InstIn.setOpcode((Opcode == Mips::DEXT) ? Mips::DEXTU : Mips::DINSU);
- return;
- }
- } else { // DEXTM/DINSM
- assert(pos < 32 && "DEXT/DINS cannot have both size and pos > 32");
- InstIn.getOperand(3).setImm(size - 32);
- InstIn.setOpcode((Opcode == Mips::DEXT) ? Mips::DEXTM : Mips::DINSM);
- return;
- }
-}
Removed: llvm/trunk/lib/Target/Mips/MipsDirectObjLower.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsDirectObjLower.h?rev=165066&view=auto
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsDirectObjLower.h (original)
+++ llvm/trunk/lib/Target/Mips/MipsDirectObjLower.h (removed)
@@ -1,28 +0,0 @@
-//===-- MipsDirectObjLower.h - Mips LLVM direct object lowering *- C++ -*--===//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef MIPSDIRECTOBJLOWER_H
-#define MIPSDIRECTOBJLOWER_H
-#include "llvm/ADT/SmallVector.h"
-#include "llvm/Support/Compiler.h"
-
-namespace llvm {
- class MCInst;
- class MCStreamer;
-
- namespace Mips {
- /// MipsDirectObjLower - This name space is used to lower MCInstr in cases
- // where the assembler usually finishes the lowering
- // such as large shifts.
- void LowerLargeShift(MCInst &Inst);
- void LowerDextDins(MCInst &Inst);
- }
-}
-
-#endif
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