[llvm-commits] [PATCH] PR 12716: PPC crashes on vector compare

[Adhemerval Zanella]

Hi,

This patch address the PR 12716 (http://llvm.org/bugs/show_bug.cgi?id=12716). The
main issue is for vector integer compare using altivec the 'vcmpxxx' instruction
returns a vector register as well, different from integer and float-point compare
where you can specify a CR register.

With the logic on 'SelectSETCC' that calls 'SelectCC' to get the CR register,
the compare generation fails because it expects a DAG with a CR register and get
a vector register instead.

This patch changes the behavior by just returning a DAG with the vector compare
instruction based on the type. The patch also adds a testcase for all vector 
types llvm defines.

I also included a fix on signed 5-bits predicates printing, where signed values 
were not handled correctly as signed. This generates 'vspltisw' (vector splat)
instruction with SIM out of range. This issue was trigged on the testcase.

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