[llvm-commits] [llvm] r164132 - in /llvm/trunk: include/llvm/Support/ lib/CodeGen/ lib/Target/ARM/MCTargetDesc/ lib/Target/MBlaze/MCTargetDesc/ lib/Target/Mips/MCTargetDesc/ lib/Target/PowerPC/MCTargetDesc/ lib/Target/X86/MCTargetDesc/ tools/llvm
David Blaikie
dblaikie at gmail.com
Tue Sep 18 10:07:57 PDT 2012
On Tue, Sep 18, 2012 at 10:06 AM, David Blaikie <dblaikie at gmail.com> wrote:
> On Tue, Sep 18, 2012 at 9:08 AM, Roman Divacky <rdivacky at freebsd.org> wrote:
>> Author: rdivacky
>> Date: Tue Sep 18 11:08:49 2012
>> New Revision: 164132
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=164132&view=rev
>> Log:
>> When creating MCAsmBackend pass the CPU string as well. In X86AsmBackend
>> store this and use it to not emit long nops when the CPU is geode which
>> doesnt support them.
>>
>> Fixes PR11212.
>
> Please provide test cases for this. (& in future include test cases in
> the same commit as the feature/fix - this makes it easier for other
> developers to understand and have confidence in your change)
(sorry, I see you provided a test case in r164134 - though for future
reference: it's easier when the tests are included in the same commit)
> - David
>
>> Modified:
>> llvm/trunk/include/llvm/Support/TargetRegistry.h
>> llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp
>> llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
>> llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h
>> llvm/trunk/lib/Target/MBlaze/MCTargetDesc/MBlazeAsmBackend.cpp
>> llvm/trunk/lib/Target/MBlaze/MCTargetDesc/MBlazeMCTargetDesc.h
>> llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
>> llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h
>> llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
>> llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
>> llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
>> llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
>> llvm/trunk/tools/llvm-mc/llvm-mc.cpp
>>
>> Modified: llvm/trunk/include/llvm/Support/TargetRegistry.h
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/TargetRegistry.h?rev=164132&r1=164131&r2=164132&view=diff
>> ==============================================================================
>> --- llvm/trunk/include/llvm/Support/TargetRegistry.h (original)
>> +++ llvm/trunk/include/llvm/Support/TargetRegistry.h Tue Sep 18 11:08:49 2012
>> @@ -93,7 +93,9 @@
>> CodeGenOpt::Level OL);
>> typedef AsmPrinter *(*AsmPrinterCtorTy)(TargetMachine &TM,
>> MCStreamer &Streamer);
>> - typedef MCAsmBackend *(*MCAsmBackendCtorTy)(const Target &T, StringRef TT);
>> + typedef MCAsmBackend *(*MCAsmBackendCtorTy)(const Target &T,
>> + StringRef TT,
>> + StringRef CPU);
>> typedef MCTargetAsmLexer *(*MCAsmLexerCtorTy)(const Target &T,
>> const MCRegisterInfo &MRI,
>> const MCAsmInfo &MAI);
>> @@ -352,10 +354,10 @@
>> /// createMCAsmBackend - Create a target specific assembly parser.
>> ///
>> /// \param Triple The target triple string.
>> - MCAsmBackend *createMCAsmBackend(StringRef Triple) const {
>> + MCAsmBackend *createMCAsmBackend(StringRef Triple, StringRef CPU) const {
>> if (!MCAsmBackendCtorFn)
>> return 0;
>> - return MCAsmBackendCtorFn(*this, Triple);
>> + return MCAsmBackendCtorFn(*this, Triple, CPU);
>> }
>>
>> /// createMCAsmLexer - Create a target specific assembly lexer.
>> @@ -1062,8 +1064,9 @@
>> }
>>
>> private:
>> - static MCAsmBackend *Allocator(const Target &T, StringRef Triple) {
>> - return new MCAsmBackendImpl(T, Triple);
>> + static MCAsmBackend *Allocator(const Target &T, StringRef Triple,
>> + StringRef CPU) {
>> + return new MCAsmBackendImpl(T, Triple, CPU);
>> }
>> };
>>
>>
>> Modified: llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp?rev=164132&r1=164131&r2=164132&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp (original)
>> +++ llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp Tue Sep 18 11:08:49 2012
>> @@ -172,7 +172,7 @@
>> const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>();
>> MCE = getTarget().createMCCodeEmitter(*getInstrInfo(), MRI, STI,
>> *Context);
>> - MAB = getTarget().createMCAsmBackend(getTargetTriple());
>> + MAB = getTarget().createMCAsmBackend(getTargetTriple(), TargetCPU);
>> }
>>
>> MCStreamer *S = getTarget().createAsmStreamer(*Context, Out,
>> @@ -191,7 +191,7 @@
>> // emission fails.
>> MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(*getInstrInfo(), MRI,
>> STI, *Context);
>> - MCAsmBackend *MAB = getTarget().createMCAsmBackend(getTargetTriple());
>> + MCAsmBackend *MAB = getTarget().createMCAsmBackend(getTargetTriple(), TargetCPU);
>> if (MCE == 0 || MAB == 0)
>> return true;
>>
>> @@ -266,7 +266,7 @@
>> const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>();
>> MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(*getInstrInfo(), MRI,
>> STI, *Ctx);
>> - MCAsmBackend *MAB = getTarget().createMCAsmBackend(getTargetTriple());
>> + MCAsmBackend *MAB = getTarget().createMCAsmBackend(getTargetTriple(), TargetCPU);
>> if (MCE == 0 || MAB == 0)
>> return true;
>>
>>
>> Modified: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp?rev=164132&r1=164131&r2=164132&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp (original)
>> +++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp Tue Sep 18 11:08:49 2012
>> @@ -674,7 +674,7 @@
>>
>> } // end anonymous namespace
>>
>> -MCAsmBackend *llvm::createARMAsmBackend(const Target &T, StringRef TT) {
>> +MCAsmBackend *llvm::createARMAsmBackend(const Target &T, StringRef TT, StringRef CPU) {
>> Triple TheTriple(TT);
>>
>> if (TheTriple.isOSDarwin()) {
>>
>> Modified: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h?rev=164132&r1=164131&r2=164132&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h (original)
>> +++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h Tue Sep 18 11:08:49 2012
>> @@ -46,7 +46,7 @@
>> const MCSubtargetInfo &STI,
>> MCContext &Ctx);
>>
>> -MCAsmBackend *createARMAsmBackend(const Target &T, StringRef TT);
>> +MCAsmBackend *createARMAsmBackend(const Target &T, StringRef TT, StringRef CPU);
>>
>> /// createARMELFObjectWriter - Construct an ELF Mach-O object writer.
>> MCObjectWriter *createARMELFObjectWriter(raw_ostream &OS,
>>
>> Modified: llvm/trunk/lib/Target/MBlaze/MCTargetDesc/MBlazeAsmBackend.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MCTargetDesc/MBlazeAsmBackend.cpp?rev=164132&r1=164131&r2=164132&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/MBlaze/MCTargetDesc/MBlazeAsmBackend.cpp (original)
>> +++ llvm/trunk/lib/Target/MBlaze/MCTargetDesc/MBlazeAsmBackend.cpp Tue Sep 18 11:08:49 2012
>> @@ -156,7 +156,8 @@
>> }
>> } // end anonymous namespace
>>
>> -MCAsmBackend *llvm::createMBlazeAsmBackend(const Target &T, StringRef TT) {
>> +MCAsmBackend *llvm::createMBlazeAsmBackend(const Target &T, StringRef TT,
>> + StringRef CPU) {
>> Triple TheTriple(TT);
>>
>> if (TheTriple.isOSDarwin())
>>
>> Modified: llvm/trunk/lib/Target/MBlaze/MCTargetDesc/MBlazeMCTargetDesc.h
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MCTargetDesc/MBlazeMCTargetDesc.h?rev=164132&r1=164131&r2=164132&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/MBlaze/MCTargetDesc/MBlazeMCTargetDesc.h (original)
>> +++ llvm/trunk/lib/Target/MBlaze/MCTargetDesc/MBlazeMCTargetDesc.h Tue Sep 18 11:08:49 2012
>> @@ -35,7 +35,8 @@
>> const MCSubtargetInfo &STI,
>> MCContext &Ctx);
>>
>> -MCAsmBackend *createMBlazeAsmBackend(const Target &T, StringRef TT);
>> +MCAsmBackend *createMBlazeAsmBackend(const Target &T, StringRef TT,
>> + StringRef CPU);
>>
>> MCObjectWriter *createMBlazeELFObjectWriter(raw_ostream &OS, uint8_t OSABI);
>> } // End llvm namespace
>>
>> Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp?rev=164132&r1=164131&r2=164132&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp (original)
>> +++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp Tue Sep 18 11:08:49 2012
>> @@ -244,22 +244,26 @@
>> } // namespace
>>
>> // MCAsmBackend
>> -MCAsmBackend *llvm::createMipsAsmBackendEL32(const Target &T, StringRef TT) {
>> +MCAsmBackend *llvm::createMipsAsmBackendEL32(const Target &T, StringRef TT,
>> + StringRef CPU) {
>> return new MipsAsmBackend(T, Triple(TT).getOS(),
>> /*IsLittle*/true, /*Is64Bit*/false);
>> }
>>
>> -MCAsmBackend *llvm::createMipsAsmBackendEB32(const Target &T, StringRef TT) {
>> +MCAsmBackend *llvm::createMipsAsmBackendEB32(const Target &T, StringRef TT,
>> + StringRef CPU) {
>> return new MipsAsmBackend(T, Triple(TT).getOS(),
>> /*IsLittle*/false, /*Is64Bit*/false);
>> }
>>
>> -MCAsmBackend *llvm::createMipsAsmBackendEL64(const Target &T, StringRef TT) {
>> +MCAsmBackend *llvm::createMipsAsmBackendEL64(const Target &T, StringRef TT,
>> + StringRef CPU) {
>> return new MipsAsmBackend(T, Triple(TT).getOS(),
>> /*IsLittle*/true, /*Is64Bit*/true);
>> }
>>
>> -MCAsmBackend *llvm::createMipsAsmBackendEB64(const Target &T, StringRef TT) {
>> +MCAsmBackend *llvm::createMipsAsmBackendEB64(const Target &T, StringRef TT,
>> + StringRef CPU) {
>> return new MipsAsmBackend(T, Triple(TT).getOS(),
>> /*IsLittle*/false, /*Is64Bit*/true);
>> }
>>
>> Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h?rev=164132&r1=164131&r2=164132&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h (original)
>> +++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h Tue Sep 18 11:08:49 2012
>> @@ -42,10 +42,14 @@
>> const MCSubtargetInfo &STI,
>> MCContext &Ctx);
>>
>> -MCAsmBackend *createMipsAsmBackendEB32(const Target &T, StringRef TT);
>> -MCAsmBackend *createMipsAsmBackendEL32(const Target &T, StringRef TT);
>> -MCAsmBackend *createMipsAsmBackendEB64(const Target &T, StringRef TT);
>> -MCAsmBackend *createMipsAsmBackendEL64(const Target &T, StringRef TT);
>> +MCAsmBackend *createMipsAsmBackendEB32(const Target &T, StringRef TT,
>> + StringRef CPU);
>> +MCAsmBackend *createMipsAsmBackendEL32(const Target &T, StringRef TT,
>> + StringRef CPU);
>> +MCAsmBackend *createMipsAsmBackendEB64(const Target &T, StringRef TT,
>> + StringRef CPU);
>> +MCAsmBackend *createMipsAsmBackendEL64(const Target &T, StringRef TT,
>> + StringRef CPU);
>>
>> MCObjectWriter *createMipsELFObjectWriter(raw_ostream &OS,
>> uint8_t OSABI,
>>
>> Modified: llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp?rev=164132&r1=164131&r2=164132&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp (original)
>> +++ llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp Tue Sep 18 11:08:49 2012
>> @@ -181,7 +181,7 @@
>>
>>
>>
>> -MCAsmBackend *llvm::createPPCAsmBackend(const Target &T, StringRef TT) {
>> +MCAsmBackend *llvm::createPPCAsmBackend(const Target &T, StringRef TT, StringRef CPU) {
>> if (Triple(TT).isOSDarwin())
>> return new DarwinPPCAsmBackend(T);
>>
>>
>> Modified: llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h?rev=164132&r1=164131&r2=164132&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h (original)
>> +++ llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h Tue Sep 18 11:08:49 2012
>> @@ -36,7 +36,7 @@
>> const MCSubtargetInfo &STI,
>> MCContext &Ctx);
>>
>> -MCAsmBackend *createPPCAsmBackend(const Target &T, StringRef TT);
>> +MCAsmBackend *createPPCAsmBackend(const Target &T, StringRef TT, StringRef CPU);
>>
>> /// createPPCELFObjectWriter - Construct an PPC ELF object writer.
>> MCObjectWriter *createPPCELFObjectWriter(raw_ostream &OS,
>>
>> Modified: llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp?rev=164132&r1=164131&r2=164132&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp (original)
>> +++ llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp Tue Sep 18 11:08:49 2012
>> @@ -66,9 +66,10 @@
>> };
>>
>> class X86AsmBackend : public MCAsmBackend {
>> + StringRef CPU;
>> public:
>> - X86AsmBackend(const Target &T)
>> - : MCAsmBackend() {}
>> + X86AsmBackend(const Target &T, StringRef _CPU)
>> + : MCAsmBackend(), CPU(_CPU) {}
>>
>> unsigned getNumFixupKinds() const {
>> return X86::NumTargetFixupKinds;
>> @@ -305,6 +306,13 @@
>> {0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00},
>> };
>>
>> + // This CPU doesnt support long nops. If needed add more.
>> + if (CPU == "geode") {
>> + for (uint64_t i = 0; i < Count; ++i)
>> + OW->Write8(0x90);
>> + return true;
>> + }
>> +
>> // Write an optimal sequence for the first 15 bytes.
>> const uint64_t OptimalCount = (Count < 16) ? Count : 15;
>> const uint64_t Prefixes = OptimalCount <= 10 ? 0 : OptimalCount - 10;
>> @@ -327,8 +335,8 @@
>> class ELFX86AsmBackend : public X86AsmBackend {
>> public:
>> uint8_t OSABI;
>> - ELFX86AsmBackend(const Target &T, uint8_t _OSABI)
>> - : X86AsmBackend(T), OSABI(_OSABI) {
>> + ELFX86AsmBackend(const Target &T, uint8_t _OSABI, StringRef CPU)
>> + : X86AsmBackend(T, CPU), OSABI(_OSABI) {
>> HasReliableSymbolDifference = true;
>> }
>>
>> @@ -340,8 +348,8 @@
>>
>> class ELFX86_32AsmBackend : public ELFX86AsmBackend {
>> public:
>> - ELFX86_32AsmBackend(const Target &T, uint8_t OSABI)
>> - : ELFX86AsmBackend(T, OSABI) {}
>> + ELFX86_32AsmBackend(const Target &T, uint8_t OSABI, StringRef CPU)
>> + : ELFX86AsmBackend(T, OSABI, CPU) {}
>>
>> MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
>> return createX86ELFObjectWriter(OS, /*Is64Bit*/ false, OSABI);
>> @@ -350,8 +358,8 @@
>>
>> class ELFX86_64AsmBackend : public ELFX86AsmBackend {
>> public:
>> - ELFX86_64AsmBackend(const Target &T, uint8_t OSABI)
>> - : ELFX86AsmBackend(T, OSABI) {}
>> + ELFX86_64AsmBackend(const Target &T, uint8_t OSABI, StringRef CPU)
>> + : ELFX86AsmBackend(T, OSABI, CPU) {}
>>
>> MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
>> return createX86ELFObjectWriter(OS, /*Is64Bit*/ true, OSABI);
>> @@ -362,8 +370,8 @@
>> bool Is64Bit;
>>
>> public:
>> - WindowsX86AsmBackend(const Target &T, bool is64Bit)
>> - : X86AsmBackend(T)
>> + WindowsX86AsmBackend(const Target &T, bool is64Bit, StringRef CPU)
>> + : X86AsmBackend(T, CPU)
>> , Is64Bit(is64Bit) {
>> }
>>
>> @@ -374,14 +382,14 @@
>>
>> class DarwinX86AsmBackend : public X86AsmBackend {
>> public:
>> - DarwinX86AsmBackend(const Target &T)
>> - : X86AsmBackend(T) { }
>> + DarwinX86AsmBackend(const Target &T, StringRef CPU)
>> + : X86AsmBackend(T, CPU) { }
>> };
>>
>> class DarwinX86_32AsmBackend : public DarwinX86AsmBackend {
>> public:
>> - DarwinX86_32AsmBackend(const Target &T)
>> - : DarwinX86AsmBackend(T) {}
>> + DarwinX86_32AsmBackend(const Target &T, StringRef CPU)
>> + : DarwinX86AsmBackend(T, CPU) {}
>>
>> MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
>> return createX86MachObjectWriter(OS, /*Is64Bit=*/false,
>> @@ -392,8 +400,8 @@
>>
>> class DarwinX86_64AsmBackend : public DarwinX86AsmBackend {
>> public:
>> - DarwinX86_64AsmBackend(const Target &T)
>> - : DarwinX86AsmBackend(T) {
>> + DarwinX86_64AsmBackend(const Target &T, StringRef CPU)
>> + : DarwinX86AsmBackend(T, CPU) {
>> HasReliableSymbolDifference = true;
>> }
>>
>> @@ -439,28 +447,28 @@
>>
>> } // end anonymous namespace
>>
>> -MCAsmBackend *llvm::createX86_32AsmBackend(const Target &T, StringRef TT) {
>> +MCAsmBackend *llvm::createX86_32AsmBackend(const Target &T, StringRef TT, StringRef CPU) {
>> Triple TheTriple(TT);
>>
>> if (TheTriple.isOSDarwin() || TheTriple.getEnvironment() == Triple::MachO)
>> - return new DarwinX86_32AsmBackend(T);
>> + return new DarwinX86_32AsmBackend(T, CPU);
>>
>> if (TheTriple.isOSWindows())
>> - return new WindowsX86AsmBackend(T, false);
>> + return new WindowsX86AsmBackend(T, false, CPU);
>>
>> uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TheTriple.getOS());
>> - return new ELFX86_32AsmBackend(T, OSABI);
>> + return new ELFX86_32AsmBackend(T, OSABI, CPU);
>> }
>>
>> -MCAsmBackend *llvm::createX86_64AsmBackend(const Target &T, StringRef TT) {
>> +MCAsmBackend *llvm::createX86_64AsmBackend(const Target &T, StringRef TT, StringRef CPU) {
>> Triple TheTriple(TT);
>>
>> if (TheTriple.isOSDarwin() || TheTriple.getEnvironment() == Triple::MachO)
>> - return new DarwinX86_64AsmBackend(T);
>> + return new DarwinX86_64AsmBackend(T, CPU);
>>
>> if (TheTriple.isOSWindows())
>> - return new WindowsX86AsmBackend(T, true);
>> + return new WindowsX86AsmBackend(T, true, CPU);
>>
>> uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TheTriple.getOS());
>> - return new ELFX86_64AsmBackend(T, OSABI);
>> + return new ELFX86_64AsmBackend(T, OSABI, CPU);
>> }
>>
>> Modified: llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h?rev=164132&r1=164131&r2=164132&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h (original)
>> +++ llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h Tue Sep 18 11:08:49 2012
>> @@ -80,8 +80,8 @@
>> const MCSubtargetInfo &STI,
>> MCContext &Ctx);
>>
>> -MCAsmBackend *createX86_32AsmBackend(const Target &T, StringRef TT);
>> -MCAsmBackend *createX86_64AsmBackend(const Target &T, StringRef TT);
>> +MCAsmBackend *createX86_32AsmBackend(const Target &T, StringRef TT, StringRef CPU);
>> +MCAsmBackend *createX86_64AsmBackend(const Target &T, StringRef TT, StringRef CPU);
>>
>> /// createX86MachObjectWriter - Construct an X86 Mach-O object writer.
>> MCObjectWriter *createX86MachObjectWriter(raw_ostream &OS,
>>
>> Modified: llvm/trunk/tools/llvm-mc/llvm-mc.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/llvm-mc.cpp?rev=164132&r1=164131&r2=164132&view=diff
>> ==============================================================================
>> --- llvm/trunk/tools/llvm-mc/llvm-mc.cpp (original)
>> +++ llvm/trunk/tools/llvm-mc/llvm-mc.cpp Tue Sep 18 11:08:49 2012
>> @@ -409,7 +409,7 @@
>> MCAsmBackend *MAB = 0;
>> if (ShowEncoding) {
>> CE = TheTarget->createMCCodeEmitter(*MCII, *MRI, *STI, Ctx);
>> - MAB = TheTarget->createMCAsmBackend(TripleName);
>> + MAB = TheTarget->createMCAsmBackend(TripleName, MCPU);
>> }
>> Str.reset(TheTarget->createAsmStreamer(Ctx, FOS, /*asmverbose*/true,
>> /*useLoc*/ true,
>> @@ -422,7 +422,7 @@
>> } else {
>> assert(FileType == OFT_ObjectFile && "Invalid file type!");
>> MCCodeEmitter *CE = TheTarget->createMCCodeEmitter(*MCII, *MRI, *STI, Ctx);
>> - MCAsmBackend *MAB = TheTarget->createMCAsmBackend(TripleName);
>> + MCAsmBackend *MAB = TheTarget->createMCAsmBackend(TripleName, MCPU);
>> Str.reset(TheTarget->createMCObjectStreamer(TripleName, Ctx, *MAB,
>> FOS, CE, RelaxAll,
>> NoExecStack));
>>
>>
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
More information about the llvm-commits
mailing list