[llvm-commits] [llvm] r163339 - in /llvm/trunk/lib: CodeGen/ CodeGen/SelectionDAG/ Target/X86/
Duncan Sands
baldrick at free.fr
Fri Sep 7 04:07:12 PDT 2012
Hi Manman,
> Release build: guard dump functions with "ifndef NDEBUG"
is this a good idea? It is sometimes necessary to debug release builds, in
which case it is helpful to be able to call "dump" routines from the debugger.
Ciao, Duncan.
>
> No functional change.
>
> Modified:
> llvm/trunk/lib/CodeGen/LiveInterval.cpp
> llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
> llvm/trunk/lib/CodeGen/LiveVariables.cpp
> llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp
> llvm/trunk/lib/CodeGen/MachineFunction.cpp
> llvm/trunk/lib/CodeGen/MachineInstr.cpp
> llvm/trunk/lib/CodeGen/MachineLoopInfo.cpp
> llvm/trunk/lib/CodeGen/MachineScheduler.cpp
> llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp
> llvm/trunk/lib/CodeGen/RegisterPressure.cpp
> llvm/trunk/lib/CodeGen/ScheduleDAG.cpp
> llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp
> llvm/trunk/lib/CodeGen/ScoreboardHazardRecognizer.cpp
> llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
> llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
> llvm/trunk/lib/CodeGen/SlotIndexes.cpp
> llvm/trunk/lib/CodeGen/SplitKit.cpp
> llvm/trunk/lib/CodeGen/VirtRegMap.cpp
> llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp
> llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
>
> Modified: llvm/trunk/lib/CodeGen/LiveInterval.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveInterval.cpp?rev=163339&r1=163338&r2=163339&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/LiveInterval.cpp (original)
> +++ llvm/trunk/lib/CodeGen/LiveInterval.cpp Thu Sep 6 14:06:06 2012
> @@ -748,9 +748,11 @@
> return os << '[' << LR.start << ',' << LR.end << ':' << LR.valno->id << ")";
> }
>
> +#ifndef NDEBUG
> void LiveRange::dump() const {
> dbgs() << *this << "\n";
> }
> +#endif
>
> void LiveInterval::print(raw_ostream &OS) const {
> if (empty())
> @@ -783,9 +785,11 @@
> }
> }
>
> +#ifndef NDEBUG
> void LiveInterval::dump() const {
> dbgs() << *this << "\n";
> }
> +#endif
>
> #ifndef NDEBUG
> void LiveInterval::verify() const {
>
> Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=163339&r1=163338&r2=163339&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
> +++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Thu Sep 6 14:06:06 2012
> @@ -156,9 +156,11 @@
> MF->print(OS, Indexes);
> }
>
> +#ifndef NDEBUG
> void LiveIntervals::dumpInstrs() const {
> printInstrs(dbgs());
> }
> +#endif
>
> static
> bool MultipleDefsBySameMI(const MachineInstr &MI, unsigned MOIdx) {
>
> Modified: llvm/trunk/lib/CodeGen/LiveVariables.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveVariables.cpp?rev=163339&r1=163338&r2=163339&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/LiveVariables.cpp (original)
> +++ llvm/trunk/lib/CodeGen/LiveVariables.cpp Thu Sep 6 14:06:06 2012
> @@ -65,6 +65,7 @@
> }
>
> void LiveVariables::VarInfo::dump() const {
> +#ifndef NDEBUG
> dbgs() << " Alive in blocks: ";
> for (SparseBitVector<>::iterator I = AliveBlocks.begin(),
> E = AliveBlocks.end(); I != E; ++I)
> @@ -77,6 +78,7 @@
> dbgs() << "\n #" << i << ": " << *Kills[i];
> dbgs() << "\n";
> }
> +#endif
> }
>
> /// getVarInfo - Get (possibly creating) a VarInfo object for the given vreg.
>
> Modified: llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp?rev=163339&r1=163338&r2=163339&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp (original)
> +++ llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp Thu Sep 6 14:06:06 2012
> @@ -228,9 +228,11 @@
> return 0;
> }
>
> +#ifndef NDEBUG
> void MachineBasicBlock::dump() const {
> print(dbgs());
> }
> +#endif
>
> StringRef MachineBasicBlock::getName() const {
> if (const BasicBlock *LBB = getBasicBlock())
>
> Modified: llvm/trunk/lib/CodeGen/MachineFunction.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineFunction.cpp?rev=163339&r1=163338&r2=163339&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/MachineFunction.cpp (original)
> +++ llvm/trunk/lib/CodeGen/MachineFunction.cpp Thu Sep 6 14:06:06 2012
> @@ -284,9 +284,11 @@
> return std::make_pair(Result, Result + Num);
> }
>
> +#ifndef NDEBUG
> void MachineFunction::dump() const {
> print(dbgs());
> }
> +#endif
>
> StringRef MachineFunction::getName() const {
> assert(getFunction() && "No function!");
> @@ -532,9 +534,11 @@
> }
> }
>
> +#ifndef NDEBUG
> void MachineFrameInfo::dump(const MachineFunction &MF) const {
> print(MF, dbgs());
> }
> +#endif
>
> //===----------------------------------------------------------------------===//
> // MachineJumpTableInfo implementation
> @@ -629,7 +633,9 @@
> OS << '\n';
> }
>
> +#ifndef NDEBUG
> void MachineJumpTableInfo::dump() const { print(dbgs()); }
> +#endif
>
>
> //===----------------------------------------------------------------------===//
> @@ -762,4 +768,6 @@
> }
> }
>
> +#ifndef NDEBUG
> void MachineConstantPool::dump() const { print(dbgs()); }
> +#endif
>
> Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=163339&r1=163338&r2=163339&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original)
> +++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Thu Sep 6 14:06:06 2012
> @@ -1496,7 +1496,9 @@
> }
>
> void MachineInstr::dump() const {
> +#ifndef NDEBUG
> dbgs() << " " << *this;
> +#endif
> }
>
> static void printDebugLoc(DebugLoc DL, const MachineFunction *MF,
>
> Modified: llvm/trunk/lib/CodeGen/MachineLoopInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLoopInfo.cpp?rev=163339&r1=163338&r2=163339&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/MachineLoopInfo.cpp (original)
> +++ llvm/trunk/lib/CodeGen/MachineLoopInfo.cpp Thu Sep 6 14:06:06 2012
> @@ -74,6 +74,8 @@
> return BotMBB;
> }
>
> +#ifndef NDEBUG
> void MachineLoop::dump() const {
> print(dbgs());
> }
> +#endif
>
> Modified: llvm/trunk/lib/CodeGen/MachineScheduler.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineScheduler.cpp?rev=163339&r1=163338&r2=163339&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/MachineScheduler.cpp (original)
> +++ llvm/trunk/lib/CodeGen/MachineScheduler.cpp Thu Sep 6 14:06:06 2012
> @@ -764,12 +764,14 @@
> Queue.pop_back();
> }
>
> +#ifndef NDEBUG
> void dump() {
> dbgs() << Name << ": ";
> for (unsigned i = 0, e = Queue.size(); i < e; ++i)
> dbgs() << Queue[i]->NodeNum << " ";
> dbgs() << "\n";
> }
> +#endif
> };
>
> /// ConvergingScheduler shrinks the unscheduled zone using heuristics to balance
>
> Modified: llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp?rev=163339&r1=163338&r2=163339&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp (original)
> +++ llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp Thu Sep 6 14:06:06 2012
> @@ -240,6 +240,7 @@
> ScheduleDAGInstrs::exitRegion();
> }
>
> +#ifndef NDEBUG
> /// dumpSchedule - dump the scheduled Sequence.
> void SchedulePostRATDList::dumpSchedule() const {
> for (unsigned i = 0, e = Sequence.size(); i != e; i++) {
> @@ -249,6 +250,7 @@
> dbgs() << "**** NOOP ****\n";
> }
> }
> +#endif
>
> bool PostRAScheduler::runOnMachineFunction(MachineFunction &Fn) {
> TII = Fn.getTarget().getInstrInfo();
>
> Modified: llvm/trunk/lib/CodeGen/RegisterPressure.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterPressure.cpp?rev=163339&r1=163338&r2=163339&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/RegisterPressure.cpp (original)
> +++ llvm/trunk/lib/CodeGen/RegisterPressure.cpp Thu Sep 6 14:06:06 2012
> @@ -63,6 +63,7 @@
> decreaseSetPressure(MaxSetPressure, RC, TRI);
> }
>
> +#ifndef NDEBUG
> void RegisterPressure::dump(const TargetRegisterInfo *TRI) {
> dbgs() << "Live In: ";
> for (unsigned i = 0, e = LiveInRegs.size(); i < e; ++i)
> @@ -78,6 +79,7 @@
> << '\n';
> }
> }
> +#endif
>
> /// Increase the current pressure as impacted by these physical registers and
> /// bump the high water mark if needed.
>
> Modified: llvm/trunk/lib/CodeGen/ScheduleDAG.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ScheduleDAG.cpp?rev=163339&r1=163338&r2=163339&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/ScheduleDAG.cpp (original)
> +++ llvm/trunk/lib/CodeGen/ScheduleDAG.cpp Thu Sep 6 14:06:06 2012
> @@ -279,6 +279,7 @@
> } while (!WorkList.empty());
> }
>
> +#ifndef NDEBUG
> /// SUnit - Scheduling unit. It's an wrapper around either a single SDNode or
> /// a group of nodes flagged together.
> void SUnit::dump(const ScheduleDAG *G) const {
> @@ -336,6 +337,7 @@
> }
> dbgs() << "\n";
> }
> +#endif
>
> #ifndef NDEBUG
> /// VerifyScheduledDAG - Verify that all SUnits were scheduled and that
>
> Modified: llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp?rev=163339&r1=163338&r2=163339&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp (original)
> +++ llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp Thu Sep 6 14:06:06 2012
> @@ -1012,7 +1012,9 @@
> }
>
> void ScheduleDAGInstrs::dumpNode(const SUnit *SU) const {
> +#ifndef NDEBUG
> SU->getInstr()->dump();
> +#endif
> }
>
> std::string ScheduleDAGInstrs::getGraphNodeLabel(const SUnit *SU) const {
>
> Modified: llvm/trunk/lib/CodeGen/ScoreboardHazardRecognizer.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ScoreboardHazardRecognizer.cpp?rev=163339&r1=163338&r2=163339&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/ScoreboardHazardRecognizer.cpp (original)
> +++ llvm/trunk/lib/CodeGen/ScoreboardHazardRecognizer.cpp Thu Sep 6 14:06:06 2012
> @@ -89,6 +89,7 @@
> ReservedScoreboard.reset();
> }
>
> +#ifndef NDEBUG
> void ScoreboardHazardRecognizer::Scoreboard::dump() const {
> dbgs() << "Scoreboard:\n";
>
> @@ -104,6 +105,7 @@
> dbgs() << '\n';
> }
> }
> +#endif
>
> bool ScoreboardHazardRecognizer::atIssueLimit() const {
> if (IssueWidth == 0)
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp?rev=163339&r1=163338&r2=163339&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Thu Sep 6 14:06:06 2012
> @@ -1758,6 +1758,7 @@
> return V;
> }
>
> +#ifndef NDEBUG
> void dump(ScheduleDAG *DAG) const {
> // Emulate pop() without clobbering NodeQueueIds.
> std::vector<SUnit*> DumpQueue = Queue;
> @@ -1768,6 +1769,7 @@
> SU->dump(DAG);
> }
> }
> +#endif
> };
>
> typedef RegReductionPriorityQueue<bu_ls_rr_sort>
> @@ -1895,6 +1897,7 @@
> //===----------------------------------------------------------------------===//
>
> void RegReductionPQBase::dumpRegPressure() const {
> +#ifndef NDEBUG
> for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(),
> E = TRI->regclass_end(); I != E; ++I) {
> const TargetRegisterClass *RC = *I;
> @@ -1904,6 +1907,7 @@
> DEBUG(dbgs() << RC->getName() << ": " << RP << " / " << RegLimit[Id]
> << '\n');
> }
> +#endif
> }
>
> bool RegReductionPQBase::HighRegPressure(const SUnit *SU) const {
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp?rev=163339&r1=163338&r2=163339&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp Thu Sep 6 14:06:06 2012
> @@ -643,6 +643,7 @@
> }
>
> void ScheduleDAGSDNodes::dumpNode(const SUnit *SU) const {
> +#ifndef NDEBUG
> if (!SU->getNode()) {
> dbgs() << "PHYS REG COPY\n";
> return;
> @@ -659,8 +660,10 @@
> dbgs() << "\n";
> GluedNodes.pop_back();
> }
> +#endif
> }
>
> +#ifndef NDEBUG
> void ScheduleDAGSDNodes::dumpSchedule() const {
> for (unsigned i = 0, e = Sequence.size(); i != e; i++) {
> if (SUnit *SU = Sequence[i])
> @@ -669,6 +672,7 @@
> dbgs() << "**** NOOP ****\n";
> }
> }
> +#endif
>
> #ifndef NDEBUG
> /// VerifyScheduledSequence - Verify that all SUnits were scheduled and that
>
> Modified: llvm/trunk/lib/CodeGen/SlotIndexes.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SlotIndexes.cpp?rev=163339&r1=163338&r2=163339&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/SlotIndexes.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SlotIndexes.cpp Thu Sep 6 14:06:06 2012
> @@ -143,6 +143,7 @@
> }
>
>
> +#ifndef NDEBUG
> void SlotIndexes::dump() const {
> for (IndexList::const_iterator itr = indexList.begin();
> itr != indexList.end(); ++itr) {
> @@ -159,6 +160,7 @@
> dbgs() << "BB#" << i << "\t[" << MBBRanges[i].first << ';'
> << MBBRanges[i].second << ")\n";
> }
> +#endif
>
> // Print a SlotIndex to a raw_ostream.
> void SlotIndex::print(raw_ostream &os) const {
> @@ -168,9 +170,11 @@
> os << "invalid";
> }
>
> +#ifndef NDEBUG
> // Dump a SlotIndex to stderr.
> void SlotIndex::dump() const {
> print(dbgs());
> dbgs() << "\n";
> }
> +#endif
>
>
> Modified: llvm/trunk/lib/CodeGen/SplitKit.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SplitKit.cpp?rev=163339&r1=163338&r2=163339&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/SplitKit.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SplitKit.cpp Thu Sep 6 14:06:06 2012
> @@ -356,6 +356,7 @@
> Edit->anyRematerializable(0);
> }
>
> +#ifndef NDEBUG
> void SplitEditor::dump() const {
> if (RegAssign.empty()) {
> dbgs() << " empty\n";
> @@ -366,6 +367,7 @@
> dbgs() << " [" << I.start() << ';' << I.stop() << "):" << I.value();
> dbgs() << '\n';
> }
> +#endif
>
> VNInfo *SplitEditor::defValue(unsigned RegIdx,
> const VNInfo *ParentVNI,
>
> Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.cpp?rev=163339&r1=163338&r2=163339&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/VirtRegMap.cpp (original)
> +++ llvm/trunk/lib/CodeGen/VirtRegMap.cpp Thu Sep 6 14:06:06 2012
> @@ -126,9 +126,11 @@
> OS << '\n';
> }
>
> +#ifndef NDEBUG
> void VirtRegMap::dump() const {
> print(dbgs());
> }
> +#endif
>
> //===----------------------------------------------------------------------===//
> // VirtRegRewriter
>
> Modified: llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp?rev=163339&r1=163338&r2=163339&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp Thu Sep 6 14:06:06 2012
> @@ -171,6 +171,7 @@
> // Shuffle live registers to match the expectations of successor blocks.
> void finishBlockStack();
>
> +#ifndef NDEBUG
> void dumpStack() const {
> dbgs() << "Stack contents:";
> for (unsigned i = 0; i != StackTop; ++i) {
> @@ -181,6 +182,7 @@
> dbgs() << ", ST" << i << " in FP" << unsigned(PendingST[i]);
> dbgs() << "\n";
> }
> +#endif
>
> /// getSlot - Return the stack slot number a particular register number is
> /// in.
>
> Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=163339&r1=163338&r2=163339&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Thu Sep 6 14:06:06 2012
> @@ -100,6 +100,7 @@
> Base_Reg = Reg;
> }
>
> +#ifndef NDEBUG
> void dump() {
> dbgs() << "X86ISelAddressMode " << this << '\n';
> dbgs() << "Base_Reg ";
> @@ -133,6 +134,7 @@
> dbgs() << "nul";
> dbgs() << " JT" << JT << " Align" << Align << '\n';
> }
> +#endif
> };
> }
>
>
>
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