[llvm-commits] [PATCH] Remove redundant register copies when inserting to Q registers on ARM

[Anton Korobeynikov]

James,

> +      unsigned DLane = QLane & LaneMask;
> +      unsigned DReg = TRI->getSubReg(QReg, ARM::dsub_0 +
> +                                     ((QLane >> LaneShift) & LaneMask) );
Is it possible to switch to some other code w/o relying on dsub_1 ==
dsub_0 + 1 ?
There are plenty of examples of getting matching sub/super-regs in the codebase

-- 
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University