[llvm-commits] [PATCH] Remove redundant register copies when inserting to Q registers on ARM

[James Molloy]

Hi Jakob,

+      unsigned DReg = TRI->getSubReg(QReg, ARM::dsub_0 +
+                                     ((QLane >> LaneShift) &
LaneMask));

You're quite right; This should be:

+      unsigned DReg = TRI->getSubReg(QReg, ARM::dsub_0 +
+                                     ((QLane >> LaneShift) & 1));

LaneMask is a mask to get the right lane number (either 0..1 or 0..3)
but the DPR it applies to is always in the range 0..1.

I'll add some more comments hopefully tomorrow (I'm in training, so not
at my PC) in addition to correcting this if you wish?

Cheers,

James

On Tue, 2012-09-04 at 17:21 +0100, Jakob Stoklund Olesen wrote:
> On Sep 3, 2012, at 1:19 AM, James Molloy <James.Molloy at arm.com> wrote:
>
> > Hi Jakob,
> >
> > Sure. Please find attached a patch which does just this.
> >
> > OK to commit?
>
> Hi James,
>
> This masking code doesn't look right:
>
> +      unsigned DLane = QLane & LaneMask;
> +      unsigned DReg = TRI->getSubReg(QReg, ARM::dsub_0 +
> +                                     ((QLane >> LaneShift) & LaneMask) );
>
> Please add comments explaining what the various lanes and masks do.
>
> /jakob
>
>
>


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