[llvm-commits] Fix the AND dag node folding

[Silviu Baranga]

Hi Eli,

Thanks for the reviews.

> What happens if SplatBitSize is less than BitWidth?

If SplatBitSize is less than BitWidth the
and node gets removed no matter what is in the
SplatValue. This is clearly a bug. I've attached
a new patch in which this case is also handled.

Cheers,
Silviu

> -----Original Message-----
> From: Eli Friedman [mailto:eli.friedman at gmail.com]
> Sent: 01 September 2012 00:06
> To: Silviu Baranga
> Cc: llvm-commits at cs.uiuc.edu
> Subject: Re: [llvm-commits] Fix the AND dag node folding
> 
> On Thu, Aug 30, 2012 at 3:45 AM, Silviu Baranga <silbar01 at arm.com>
> wrote:
> > Hi Eli,
> >
> >> +          Constant &=
> >> SplatValue.lshr(i*BitWidthSrc).zextOrTrunc(BitWidthSrc);
> >>
> >> I don't follow what you're doing here: the splat value is computed
> >> relative to the BUILD_VECTOR, and is completely unrelated to the
> width
> >> of the original load.
> > Good catch. There is a bug in that statement, and it should have
> been:
> > "Constant &=
> SplatValue.lshr(i*BitWidthDst).zextOrTrunc(BitWidthSrc);"
> > to be correct.
> >
> > However, it turns out that it doesn't matter if we use the load type
> > size there or not since we will zextOrTrunc the constant to the
> > load type lane size anyway further down the code path. Therefore,
> > I've removed any references to the load node from the changes.
> >
> > I've attached an updated patch.
> 
> What happens if SplatBitSize is less than BitWidth?
> 
> Otherwise, looks fine.
> 
> -Eli
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