[llvm-commits] Fix the AND dag node folding

Eli Friedman eli.friedman at gmail.com
Wed Aug 29 13:39:48 PDT 2012


On Thu, Aug 23, 2012 at 8:54 AM, Silviu Baranga <silbar01 at arm.com> wrote:
> Hi,
>
> There are currently some bugs in implementation of the folding of AND nodes
> in the DAG combiner which cause the DAG combiner to miss some folding
> opportunities when trying to fold "(and (load ([non_ext|zero_ext] V)))" on
> vector types.
>
> The issues are:
> 1. The VT type was not corresponding to the input vector type when the LOAD
>    dag node was the operand of the LOAD node.

+          Constant &= SplatValue.lshr(i*BitWidthSrc).zextOrTrunc(BitWidthSrc);

I don't follow what you're doing here: the splat value is computed
relative to the BUILD_VECTOR, and is completely unrelated to the width
of the original load.

> 2. The isConstantSplat method does not always return a mask with values for
>    all the vector lanes (it reduces this mask when possible).

+        for (unsigned i = 0, n = SplatBitSize/BitWidthDst; i < n; ++i)

This part looks fine.

-Eli



More information about the llvm-commits mailing list