[llvm-commits] [llvm] r157006 - in /llvm/trunk/lib/CodeGen: MachineScheduler.cpp RegisterPressure.cpp RegisterPressure.h

[Sergei Larin]

Andy, 

 

  Thanks for that clarification. I'll spend more time with it nonetheless to
better understand it - my next goal is to add DFA to the overall equation. 

Also if it is any use to you at this point, it looks like we could benefit
from moving class MachineSchedStrategy to ScheduleDAGInstrs.h.

 

Thanks.

 

Sergei

 

--

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum.

 

From: Andrew Trick [mailto:atrick at apple.com] 
Sent: Wednesday, August 15, 2012 3:39 PM
To: Sergei Larin
Cc: llvm-commits at cs.uiuc.edu
Subject: Re: [llvm-commits] [llvm] r157006 - in /llvm/trunk/lib/CodeGen:
MachineScheduler.cpp RegisterPressure.cpp RegisterPressure.h

 

 

On Aug 15, 2012, at 11:56 AM, Sergei Larin <slarin at codeaurora.org> wrote:





Andy,

 

  I am still at an earlier stage.   I am trying to "port" VLIW scheduler to
the "new" MI infrastructure. So far I simply copied default implementation
and trying to make it work as is for my back end.

I currently have no reg pressure interface, so as a result the scheduler
basically picks "NCAND" every time. I am trying to define these methods to
enable reg pressure tracking:

 

// Get the weight in units of pressure for this register class.

  virtual const RegClassWeight &getRegClassWeight(

    const TargetRegisterClass *RC) const = 0;

 

  /// Get the number of dimensions of register pressure.

  virtual unsigned getNumRegPressureSets() const = 0;

 

  /// Get the name of this register unit pressure set.

  virtual const char *getRegPressureSetName(unsigned Idx) const = 0;

 

  /// Get the register unit pressure limit for this dimension.

  /// This limit must be adjusted dynamically for reserved registers.

  virtual unsigned getRegPressureSetLimit(unsigned Idx) const = 0;

 

  /// Get the dimensions of register pressure impacted by this register
class.

  /// Returns a -1 terminated array of pressure set IDs.

  virtual const int *getRegClassPressureSets(

    const TargetRegisterClass *RC) const = 0;

 

.but kind of uncertain about intent around getRegClassPressureSets - I am
trying to read the code in RegisterPressure.cpp, but it sure would be much
easier if I would know your intent.

 

Here is what I gather so far, please tell me if I am wrong:

getRegClassWeight - should reflect how "expensive" a specific RC is.

getRegPressureSetLimit - is when I start to worry about register pressure
(threshold of a sort).

getNumRegPressureSets - total number of sets(?)

getRegPressureSetName - their name.

 

But I am not sure what getRegClassPressureSets should produce.

 

One set per RC? Is it multiple sets per RC? If so, what is the heuristic for
split? Calle/caller save etc?

 

Anything else I am missing for full reg pressure tracking?

 

You don't need to port anything.

 

Pressure sets are meant to handle complex register files with overlapping
register classes and subregisters. On Hexagon, it's very simple as you can
see in HexagonGenRegisterInfo.inc.

 

/// Get the weight in units of pressure for this register class.

const RegClassWeight &HexagonGenRegisterInfo::

getRegClassWeight(const TargetRegisterClass *RC) const {

  static const RegClassWeight RCWeightTable[] = {

    {1, 32},     // IntRegs

    {1, 8},       // CRRegs

    {1, 4},       // PredRegs

    {2, 32},     // DoubleRegs

    {0, 0} };

  return RCWeightTable[RC->getID()];

}

 

You can ask for the Set ID from a register class with:

 

const int* HexagonGenRegisterInfo::

getRegClassPressureSets(const TargetRegisterClass *RC) const {

  static const int RCSetsTable[] = {

    0,  -1,         // IntRegs

    1,  -1,         // CRRegs

    2,  -1,         // PredRegs

    0,  -1,         // DoubleRegs

    -1 };

  static const unsigned RCSetStartTable[] = {

    0,2,4,6,0 };

  unsigned SetListStart = RCSetStartTable[RC->getID()];

  return &RCSetsTable[SetListStart];

}

 

Just grab the first ID and assert that the next is -1.

 

Incidentally, register weight is not really the same as spill cost. Register
weight really indicates the number of register units that may be contained
within a register of that class.

 

I still need to add some notion of spill cost to compareRPDelta to properly
balance int vs. float spills...

 

-Andy

-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20120815/c621b20a/attachment.html>