[llvm-commits] PATCH: Fix atomic load store instruction for pointer type

[Logan Chien]

Ping?


On Sat, Aug 4, 2012 at 10:57 PM, Logan Chien <tzuhsiang.chien at gmail.com>wrote:

> Dear all,
>
>   It seems that the target-independent code generator has some problem
> while handling *atomic* load/store instruction with pointer type, such as:
>
>   %0 = load atomic i32** %a0 singlethread unordered, align 4
>   store atomic i32* %a0, i32** %a1 singlethread unordered, align 4
>   ; (read the patch for the complete test case)
>
>   These instructions will cause SEGV when we are running llc.  This is due
> to the fact that llvm::EVT::getSizeInBits() does not support pointer type,
> which
> is target-dependent.  We should translate the pointer type with
> llvm::TargetLowering::getValueType().  I hope the attached patch can fix
> the
> problem.  Thanks for your reading.
>
> Sincerely,
> Logan
>
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