[llvm-commits] [PATCH 1/2] Fix PR12312

[Liao, Michael]

Most flag-generating intrinsics returns i32 instead of i8 and do zero-extend after SETcc. We need skip them.

Yours
- Michael

-----Original Message-----
From: Evan Cheng [mailto:evan.cheng at apple.com] 
Sent: Monday, August 06, 2012 1:02 PM
To: Liao, Michael
Cc: llvm-commits at cs.uiuc.edu
Subject: Re: [llvm-commits] [PATCH 1/2] Fix PR12312

The patch looks fine. But this part looks funny to me:

+  // Skip all 'zext' nodes.
+  while (SetCC.getOpcode() == ISD::ZERO_EXTEND)
+    SetCC = SetCC.getOperand(0);
+

Why is a loop needed?

Evan

On Aug 3, 2012, at 12:53 PM, Michael Liao <michael.liao at intel.com> wrote:

> Hi
> 
> Just ping after 2 days. Does this patch looks good?
> 
> Yours
> - Michael
> 
> On Wed, 2012-08-01 at 12:46 -0700, Michael Liao wrote:
>> Hi
>> 
>> This patch is to fix http://llvm.org/bugs/show_bug.cgi?id=12312, 
>> where a special use of i128 needs efficient code generation with 
>> PTEST from SSE4.1.
>> 
>> To fix this issue, 2 patches are developed. The first part is to 
>> simplify a common pattern introduced by most intrinsics generating 
>> boolean values. Their boolean result are re-evaluated again to get 
>> EFLAGS updated for BRCOND/CMOV or even SETCC again to consume. The 
>> attached patch adds a X86-specific DAG optimzation to simplify this 
>> common pattern by directly consuming the EFLAGS updated from the 
>> original intrinsics, e.g. llvm.x86.sse41.ptest, if we found that 
>> integer result is checked as a boolean value.
>> 
>> Yours
>> - Michael
>> 
>> 
>> 
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> 
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