[llvm-commits] [llvm] r161161 - in /llvm/trunk: lib/Target/ARM/AsmParser/ARMAsmParser.cpp lib/Target/ARM/Disassembler/ARMDisassembler.cpp lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h test/MC/ARM/basic-arm-instructions.s test/MC/ARM/basic-thumb2-instructions.s test/MC/Disassembler/ARM/basic-arm-instructions.txt test/MC/Disassembler/ARM/thumb2.txt
Jiangning Liu
jiangning.liu at arm.com
Thu Aug 2 01:21:27 PDT 2012
Author: jiangning
Date: Thu Aug 2 03:21:27 2012
New Revision: 161161
URL: http://llvm.org/viewvc/llvm-project?rev=161161&view=rev
Log:
Fix #13138, a bug around ARM instruction DSB encoding and decoding issue.
Modified:
llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h
llvm/trunk/test/MC/ARM/basic-arm-instructions.s
llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s
llvm/trunk/test/MC/Disassembler/ARM/basic-arm-instructions.txt
llvm/trunk/test/MC/Disassembler/ARM/thumb2.txt
Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=161161&r1=161160&r2=161161&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Thu Aug 2 03:21:27 2012
@@ -3279,29 +3279,59 @@
parseMemBarrierOptOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
SMLoc S = Parser.getTok().getLoc();
const AsmToken &Tok = Parser.getTok();
- if (!Tok.is(AsmToken::Identifier))
- return MatchOperand_NoMatch;
- StringRef OptStr = Tok.getString();
+ unsigned Opt;
- unsigned Opt = StringSwitch<unsigned>(OptStr.slice(0, OptStr.size()).lower())
- .Case("sy", ARM_MB::SY)
- .Case("st", ARM_MB::ST)
- .Case("sh", ARM_MB::ISH)
- .Case("ish", ARM_MB::ISH)
- .Case("shst", ARM_MB::ISHST)
- .Case("ishst", ARM_MB::ISHST)
- .Case("nsh", ARM_MB::NSH)
- .Case("un", ARM_MB::NSH)
- .Case("nshst", ARM_MB::NSHST)
- .Case("unst", ARM_MB::NSHST)
- .Case("osh", ARM_MB::OSH)
- .Case("oshst", ARM_MB::OSHST)
- .Default(~0U);
+ if (Tok.is(AsmToken::Identifier)) {
+ StringRef OptStr = Tok.getString();
- if (Opt == ~0U)
- return MatchOperand_NoMatch;
+ Opt = StringSwitch<unsigned>(OptStr.slice(0, OptStr.size()).lower())
+ .Case("sy", ARM_MB::SY)
+ .Case("st", ARM_MB::ST)
+ .Case("sh", ARM_MB::ISH)
+ .Case("ish", ARM_MB::ISH)
+ .Case("shst", ARM_MB::ISHST)
+ .Case("ishst", ARM_MB::ISHST)
+ .Case("nsh", ARM_MB::NSH)
+ .Case("un", ARM_MB::NSH)
+ .Case("nshst", ARM_MB::NSHST)
+ .Case("unst", ARM_MB::NSHST)
+ .Case("osh", ARM_MB::OSH)
+ .Case("oshst", ARM_MB::OSHST)
+ .Default(~0U);
+
+ if (Opt == ~0U)
+ return MatchOperand_NoMatch;
+
+ Parser.Lex(); // Eat identifier token.
+ } else if (Tok.is(AsmToken::Hash) ||
+ Tok.is(AsmToken::Dollar) ||
+ Tok.is(AsmToken::Integer)) {
+ if (Parser.getTok().isNot(AsmToken::Integer))
+ Parser.Lex(); // Eat the '#'.
+ SMLoc Loc = Parser.getTok().getLoc();
+
+ const MCExpr *MemBarrierID;
+ if (getParser().ParseExpression(MemBarrierID)) {
+ Error(Loc, "illegal expression");
+ return MatchOperand_ParseFail;
+ }
+
+ const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(MemBarrierID);
+ if (!CE) {
+ Error(Loc, "constant expression expected");
+ return MatchOperand_ParseFail;
+ }
+
+ int Val = CE->getValue();
+ if (Val & ~0xf) {
+ Error(Loc, "immediate value out of range");
+ return MatchOperand_ParseFail;
+ }
+
+ Opt = ARM_MB::RESERVED_0 + Val;
+ } else
+ return MatchOperand_ParseFail;
- Parser.Lex(); // Eat identifier token.
Operands.push_back(ARMOperand::CreateMemBarrierOpt((ARM_MB::MemBOpt)Opt, S));
return MatchOperand_Success;
}
Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp?rev=161161&r1=161160&r2=161161&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Thu Aug 2 03:21:27 2012
@@ -3494,19 +3494,8 @@
static DecodeStatus DecodeMemBarrierOption(MCInst &Inst, unsigned Val,
uint64_t Address, const void *Decoder) {
- switch (Val) {
- default:
+ if (Val & ~0xf)
return MCDisassembler::Fail;
- case 0xF: // SY
- case 0xE: // ST
- case 0xB: // ISH
- case 0xA: // ISHST
- case 0x7: // NSH
- case 0x6: // NSHST
- case 0x3: // OSH
- case 0x2: // OSHST
- break;
- }
Inst.addOperand(MCOperand::CreateImm(Val));
return MCDisassembler::Success;
Modified: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h?rev=161161&r1=161160&r2=161161&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h (original)
+++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h Thu Aug 2 03:21:27 2012
@@ -120,14 +120,22 @@
// The Memory Barrier Option constants map directly to the 4-bit encoding of
// the option field for memory barrier operations.
enum MemBOpt {
- SY = 15,
- ST = 14,
- ISH = 11,
- ISHST = 10,
- NSH = 7,
- NSHST = 6,
+ RESERVED_0 = 0,
+ RESERVED_1 = 1,
+ OSHST = 2,
OSH = 3,
- OSHST = 2
+ RESERVED_4 = 4,
+ RESERVED_5 = 5,
+ NSHST = 6,
+ NSH = 7,
+ RESERVED_8 = 8,
+ RESERVED_9 = 9,
+ ISHST = 10,
+ ISH = 11,
+ RESERVED_12 = 12,
+ RESERVED_13 = 13,
+ ST = 14,
+ SY = 15
};
inline static const char *MemBOptToString(unsigned val) {
@@ -135,12 +143,20 @@
default: llvm_unreachable("Unknown memory operation");
case SY: return "sy";
case ST: return "st";
+ case RESERVED_13: return "#0xd";
+ case RESERVED_12: return "#0xc";
case ISH: return "ish";
case ISHST: return "ishst";
+ case RESERVED_9: return "#0x9";
+ case RESERVED_8: return "#0x8";
case NSH: return "nsh";
case NSHST: return "nshst";
+ case RESERVED_5: return "#0x5";
+ case RESERVED_4: return "#0x4";
case OSH: return "osh";
case OSHST: return "oshst";
+ case RESERVED_1: return "#0x1";
+ case RESERVED_0: return "#0x0";
}
}
} // namespace ARM_MB
Modified: llvm/trunk/test/MC/ARM/basic-arm-instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-arm-instructions.s?rev=161161&r1=161160&r2=161161&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/basic-arm-instructions.s (original)
+++ llvm/trunk/test/MC/ARM/basic-arm-instructions.s Thu Aug 2 03:21:27 2012
@@ -567,6 +567,23 @@
@------------------------------------------------------------------------------
@ DMB
@------------------------------------------------------------------------------
+ dmb #0xf
+ dmb #0xe
+ dmb #0xd
+ dmb #0xc
+ dmb #0xb
+ dmb #0xa
+ dmb #0x9
+ dmb #0x8
+ dmb #0x7
+ dmb #0x6
+ dmb #0x5
+ dmb #0x4
+ dmb #0x3
+ dmb #0x2
+ dmb #0x1
+ dmb #0x0
+
dmb sy
dmb st
dmb sh
@@ -583,6 +600,23 @@
@ CHECK: dmb sy @ encoding: [0x5f,0xf0,0x7f,0xf5]
@ CHECK: dmb st @ encoding: [0x5e,0xf0,0x7f,0xf5]
+@ CHECK: dmb #0xd @ encoding: [0x5d,0xf0,0x7f,0xf5]
+@ CHECK: dmb #0xc @ encoding: [0x5c,0xf0,0x7f,0xf5]
+@ CHECK: dmb ish @ encoding: [0x5b,0xf0,0x7f,0xf5]
+@ CHECK: dmb ishst @ encoding: [0x5a,0xf0,0x7f,0xf5]
+@ CHECK: dmb #0x9 @ encoding: [0x59,0xf0,0x7f,0xf5]
+@ CHECK: dmb #0x8 @ encoding: [0x58,0xf0,0x7f,0xf5]
+@ CHECK: dmb nsh @ encoding: [0x57,0xf0,0x7f,0xf5]
+@ CHECK: dmb nshst @ encoding: [0x56,0xf0,0x7f,0xf5]
+@ CHECK: dmb #0x5 @ encoding: [0x55,0xf0,0x7f,0xf5]
+@ CHECK: dmb #0x4 @ encoding: [0x54,0xf0,0x7f,0xf5]
+@ CHECK: dmb osh @ encoding: [0x53,0xf0,0x7f,0xf5]
+@ CHECK: dmb oshst @ encoding: [0x52,0xf0,0x7f,0xf5]
+@ CHECK: dmb #0x1 @ encoding: [0x51,0xf0,0x7f,0xf5]
+@ CHECK: dmb #0x0 @ encoding: [0x50,0xf0,0x7f,0xf5]
+
+@ CHECK: dmb sy @ encoding: [0x5f,0xf0,0x7f,0xf5]
+@ CHECK: dmb st @ encoding: [0x5e,0xf0,0x7f,0xf5]
@ CHECK: dmb ish @ encoding: [0x5b,0xf0,0x7f,0xf5]
@ CHECK: dmb ish @ encoding: [0x5b,0xf0,0x7f,0xf5]
@ CHECK: dmb ishst @ encoding: [0x5a,0xf0,0x7f,0xf5]
@@ -598,6 +632,26 @@
@------------------------------------------------------------------------------
@ DSB
@------------------------------------------------------------------------------
+ dsb #0xf
+ dsb #0xe
+ dsb #0xd
+ dsb #0xc
+ dsb #0xb
+ dsb #0xa
+ dsb #0x9
+ dsb #0x8
+ dsb #0x7
+ dsb #0x6
+ dsb #0x5
+ dsb #0x4
+ dsb #0x3
+ dsb #0x2
+ dsb #0x1
+ dsb #0x0
+
+ dsb 8
+ dsb 7
+
dsb sy
dsb st
dsb sh
@@ -614,6 +668,26 @@
@ CHECK: dsb sy @ encoding: [0x4f,0xf0,0x7f,0xf5]
@ CHECK: dsb st @ encoding: [0x4e,0xf0,0x7f,0xf5]
+@ CHECK: dsb #0xd @ encoding: [0x4d,0xf0,0x7f,0xf5]
+@ CHECK: dsb #0xc @ encoding: [0x4c,0xf0,0x7f,0xf5]
+@ CHECK: dsb ish @ encoding: [0x4b,0xf0,0x7f,0xf5]
+@ CHECK: dsb ishst @ encoding: [0x4a,0xf0,0x7f,0xf5]
+@ CHECK: dsb #0x9 @ encoding: [0x49,0xf0,0x7f,0xf5]
+@ CHECK: dsb #0x8 @ encoding: [0x48,0xf0,0x7f,0xf5]
+@ CHECK: dsb nsh @ encoding: [0x47,0xf0,0x7f,0xf5]
+@ CHECK: dsb nshst @ encoding: [0x46,0xf0,0x7f,0xf5]
+@ CHECK: dsb #0x5 @ encoding: [0x45,0xf0,0x7f,0xf5]
+@ CHECK: dsb #0x4 @ encoding: [0x44,0xf0,0x7f,0xf5]
+@ CHECK: dsb osh @ encoding: [0x43,0xf0,0x7f,0xf5]
+@ CHECK: dsb oshst @ encoding: [0x42,0xf0,0x7f,0xf5]
+@ CHECK: dsb #0x1 @ encoding: [0x41,0xf0,0x7f,0xf5]
+@ CHECK: dsb #0x0 @ encoding: [0x40,0xf0,0x7f,0xf5]
+
+@ CHECK: dsb #0x8 @ encoding: [0x48,0xf0,0x7f,0xf5]
+@ CHECK: dsb nsh @ encoding: [0x47,0xf0,0x7f,0xf5]
+
+@ CHECK: dsb sy @ encoding: [0x4f,0xf0,0x7f,0xf5]
+@ CHECK: dsb st @ encoding: [0x4e,0xf0,0x7f,0xf5]
@ CHECK: dsb ish @ encoding: [0x4b,0xf0,0x7f,0xf5]
@ CHECK: dsb ish @ encoding: [0x4b,0xf0,0x7f,0xf5]
@ CHECK: dsb ishst @ encoding: [0x4a,0xf0,0x7f,0xf5]
Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=161161&r1=161160&r2=161161&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original)
+++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Thu Aug 2 03:21:27 2012
@@ -417,6 +417,23 @@
@------------------------------------------------------------------------------
@ DMB
@------------------------------------------------------------------------------
+ dmb #0xf
+ dmb #0xe
+ dmb #0xd
+ dmb #0xc
+ dmb #0xb
+ dmb #0xa
+ dmb #0x9
+ dmb #0x8
+ dmb #0x7
+ dmb #0x6
+ dmb #0x5
+ dmb #0x4
+ dmb #0x3
+ dmb #0x2
+ dmb #0x1
+ dmb #0x0
+
dmb sy
dmb st
dmb sh
@@ -433,6 +450,23 @@
@ CHECK: dmb sy @ encoding: [0xbf,0xf3,0x5f,0x8f]
@ CHECK: dmb st @ encoding: [0xbf,0xf3,0x5e,0x8f]
+@ CHECK: dmb #0xd @ encoding: [0xbf,0xf3,0x5d,0x8f]
+@ CHECK: dmb #0xc @ encoding: [0xbf,0xf3,0x5c,0x8f]
+@ CHECK: dmb ish @ encoding: [0xbf,0xf3,0x5b,0x8f]
+@ CHECK: dmb ishst @ encoding: [0xbf,0xf3,0x5a,0x8f]
+@ CHECK: dmb #0x9 @ encoding: [0xbf,0xf3,0x59,0x8f]
+@ CHECK: dmb #0x8 @ encoding: [0xbf,0xf3,0x58,0x8f]
+@ CHECK: dmb nsh @ encoding: [0xbf,0xf3,0x57,0x8f]
+@ CHECK: dmb nshst @ encoding: [0xbf,0xf3,0x56,0x8f]
+@ CHECK: dmb #0x5 @ encoding: [0xbf,0xf3,0x55,0x8f]
+@ CHECK: dmb #0x4 @ encoding: [0xbf,0xf3,0x54,0x8f]
+@ CHECK: dmb osh @ encoding: [0xbf,0xf3,0x53,0x8f]
+@ CHECK: dmb oshst @ encoding: [0xbf,0xf3,0x52,0x8f]
+@ CHECK: dmb #0x1 @ encoding: [0xbf,0xf3,0x51,0x8f]
+@ CHECK: dmb #0x0 @ encoding: [0xbf,0xf3,0x50,0x8f]
+
+@ CHECK: dmb sy @ encoding: [0xbf,0xf3,0x5f,0x8f]
+@ CHECK: dmb st @ encoding: [0xbf,0xf3,0x5e,0x8f]
@ CHECK: dmb ish @ encoding: [0xbf,0xf3,0x5b,0x8f]
@ CHECK: dmb ish @ encoding: [0xbf,0xf3,0x5b,0x8f]
@ CHECK: dmb ishst @ encoding: [0xbf,0xf3,0x5a,0x8f]
@@ -449,6 +483,23 @@
@------------------------------------------------------------------------------
@ DSB
@------------------------------------------------------------------------------
+ dsb #0xf
+ dsb #0xe
+ dsb #0xd
+ dsb #0xc
+ dsb #0xb
+ dsb #0xa
+ dsb #0x9
+ dsb #0x8
+ dsb #0x7
+ dsb #0x6
+ dsb #0x5
+ dsb #0x4
+ dsb #0x3
+ dsb #0x2
+ dsb #0x1
+ dsb #0x0
+
dsb sy
dsb st
dsb sh
@@ -465,6 +516,23 @@
@ CHECK: dsb sy @ encoding: [0xbf,0xf3,0x4f,0x8f]
@ CHECK: dsb st @ encoding: [0xbf,0xf3,0x4e,0x8f]
+@ CHECK: dsb #0xd @ encoding: [0xbf,0xf3,0x4d,0x8f]
+@ CHECK: dsb #0xc @ encoding: [0xbf,0xf3,0x4c,0x8f]
+@ CHECK: dsb ish @ encoding: [0xbf,0xf3,0x4b,0x8f]
+@ CHECK: dsb ishst @ encoding: [0xbf,0xf3,0x4a,0x8f]
+@ CHECK: dsb #0x9 @ encoding: [0xbf,0xf3,0x49,0x8f]
+@ CHECK: dsb #0x8 @ encoding: [0xbf,0xf3,0x48,0x8f]
+@ CHECK: dsb nsh @ encoding: [0xbf,0xf3,0x47,0x8f]
+@ CHECK: dsb nshst @ encoding: [0xbf,0xf3,0x46,0x8f]
+@ CHECK: dsb #0x5 @ encoding: [0xbf,0xf3,0x45,0x8f]
+@ CHECK: dsb #0x4 @ encoding: [0xbf,0xf3,0x44,0x8f]
+@ CHECK: dsb osh @ encoding: [0xbf,0xf3,0x43,0x8f]
+@ CHECK: dsb oshst @ encoding: [0xbf,0xf3,0x42,0x8f]
+@ CHECK: dsb #0x1 @ encoding: [0xbf,0xf3,0x41,0x8f]
+@ CHECK: dsb #0x0 @ encoding: [0xbf,0xf3,0x40,0x8f]
+
+@ CHECK: dsb sy @ encoding: [0xbf,0xf3,0x4f,0x8f]
+@ CHECK: dsb st @ encoding: [0xbf,0xf3,0x4e,0x8f]
@ CHECK: dsb ish @ encoding: [0xbf,0xf3,0x4b,0x8f]
@ CHECK: dsb ish @ encoding: [0xbf,0xf3,0x4b,0x8f]
@ CHECK: dsb ishst @ encoding: [0xbf,0xf3,0x4a,0x8f]
Modified: llvm/trunk/test/MC/Disassembler/ARM/basic-arm-instructions.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/basic-arm-instructions.txt?rev=161161&r1=161160&r2=161161&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/basic-arm-instructions.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/basic-arm-instructions.txt Thu Aug 2 03:21:27 2012
@@ -475,47 +475,77 @@
#------------------------------------------------------------------------------
# DMB
#------------------------------------------------------------------------------
-# CHECK: dmb sy
-# CHECK: dmb st
-# CHECK: dmb ish
-# CHECK: dmb ishst
-# CHECK: dmb nsh
-# CHECK: dmb nshst
-# CHECK: dmb osh
+
+# CHECK: dmb #0x0
+# CHECK: dmb #0x1
# CHECK: dmb oshst
-# CHECK: dmb
+# CHECK: dmb osh
+# CHECK: dmb #0x4
+# CHECK: dmb #0x5
+# CHECK: dmb nshst
+# CHECK: dmb nsh
+# CHECK: dmb #0x8
+# CHECK: dmb #0x9
+# CHECK: dmb ishst
+# CHECK: dmb ish
+# CHECK: dmb #0xc
+# CHECK: dmb #0xd
+# CHECK: dmb st
+# CHECK: dmb sy
-0x5f 0xf0 0x7f 0xf5
-0x5e 0xf0 0x7f 0xf5
-0x5b 0xf0 0x7f 0xf5
-0x5a 0xf0 0x7f 0xf5
-0x57 0xf0 0x7f 0xf5
-0x56 0xf0 0x7f 0xf5
-0x53 0xf0 0x7f 0xf5
+0x50 0xf0 0x7f 0xf5
+0x51 0xf0 0x7f 0xf5
0x52 0xf0 0x7f 0xf5
+0x53 0xf0 0x7f 0xf5
+0x54 0xf0 0x7f 0xf5
+0x55 0xf0 0x7f 0xf5
+0x56 0xf0 0x7f 0xf5
+0x57 0xf0 0x7f 0xf5
+0x58 0xf0 0x7f 0xf5
+0x59 0xf0 0x7f 0xf5
+0x5a 0xf0 0x7f 0xf5
+0x5b 0xf0 0x7f 0xf5
+0x5c 0xf0 0x7f 0xf5
+0x5d 0xf0 0x7f 0xf5
+0x5e 0xf0 0x7f 0xf5
0x5f 0xf0 0x7f 0xf5
#------------------------------------------------------------------------------
# DSB
#------------------------------------------------------------------------------
-# CHECK: dsb sy
-# CHECK: dsb st
-# CHECK: dsb ish
-# CHECK: dsb ishst
-# CHECK: dsb nsh
-# CHECK: dsb nshst
-# CHECK: dsb osh
-# CHECK: dsb oshst
-# CHECK: dsb
-0x4f 0xf0 0x7f 0xf5
-0x4e 0xf0 0x7f 0xf5
-0x4b 0xf0 0x7f 0xf5
-0x4a 0xf0 0x7f 0xf5
-0x47 0xf0 0x7f 0xf5
-0x46 0xf0 0x7f 0xf5
-0x43 0xf0 0x7f 0xf5
+# CHECK: dsb #0x0
+# CHECK: dsb #0x1
+# CHECK: dsb oshst
+# CHECK: dsb osh
+# CHECK: dsb #0x4
+# CHECK: dsb #0x5
+# CHECK: dsb nshst
+# CHECK: dsb nsh
+# CHECK: dsb #0x8
+# CHECK: dsb #0x9
+# CHECK: dsb ishst
+# CHECK: dsb ish
+# CHECK: dsb #0xc
+# CHECK: dsb #0xd
+# CHECK: dsb st
+# CHECK: dsb sy
+
+0x40 0xf0 0x7f 0xf5
+0x41 0xf0 0x7f 0xf5
0x42 0xf0 0x7f 0xf5
+0x43 0xf0 0x7f 0xf5
+0x44 0xf0 0x7f 0xf5
+0x45 0xf0 0x7f 0xf5
+0x46 0xf0 0x7f 0xf5
+0x47 0xf0 0x7f 0xf5
+0x48 0xf0 0x7f 0xf5
+0x49 0xf0 0x7f 0xf5
+0x4a 0xf0 0x7f 0xf5
+0x4b 0xf0 0x7f 0xf5
+0x4c 0xf0 0x7f 0xf5
+0x4d 0xf0 0x7f 0xf5
+0x4e 0xf0 0x7f 0xf5
0x4f 0xf0 0x7f 0xf5
#------------------------------------------------------------------------------
Modified: llvm/trunk/test/MC/Disassembler/ARM/thumb2.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/thumb2.txt?rev=161161&r1=161160&r2=161161&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/thumb2.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/thumb2.txt Thu Aug 2 03:21:27 2012
@@ -346,23 +346,37 @@
#------------------------------------------------------------------------------
#CHECK: dmb sy
#CHECK: dmb st
+#CHECK: dmb #0xd
+#CHECK: dmb #0xc
#CHECK: dmb ish
#CHECK: dmb ishst
+#CHECK: dmb #0x9
+#CHECK: dmb #0x8
#CHECK: dmb nsh
#CHECK: dmb nshst
+#CHECK: dmb #0x5
+#CHECK: dmb #0x4
#CHECK: dmb osh
#CHECK: dmb oshst
-#CHECK: dmb
+#CHECK: dmb #0x1
+#CHECK: dmb #0x0
0xbf 0xf3 0x5f 0x8f
0xbf 0xf3 0x5e 0x8f
+0xbf 0xf3 0x5d 0x8f
+0xbf 0xf3 0x5c 0x8f
0xbf 0xf3 0x5b 0x8f
0xbf 0xf3 0x5a 0x8f
+0xbf 0xf3 0x59 0x8f
+0xbf 0xf3 0x58 0x8f
0xbf 0xf3 0x57 0x8f
0xbf 0xf3 0x56 0x8f
+0xbf 0xf3 0x55 0x8f
+0xbf 0xf3 0x54 0x8f
0xbf 0xf3 0x53 0x8f
0xbf 0xf3 0x52 0x8f
-0xbf 0xf3 0x5f 0x8f
+0xbf 0xf3 0x51 0x8f
+0xbf 0xf3 0x50 0x8f
#------------------------------------------------------------------------------
@@ -370,21 +384,37 @@
#------------------------------------------------------------------------------
#CHECK: dsb sy
#CHECK: dsb st
+#CHECK: dsb #0xd
+#CHECK: dsb #0xc
#CHECK: dsb ish
#CHECK: dsb ishst
+#CHECK: dsb #0x9
+#CHECK: dsb #0x8
#CHECK: dsb nsh
#CHECK: dsb nshst
+#CHECK: dsb #0x5
+#CHECK: dsb #0x4
#CHECK: dsb osh
#CHECK: dsb oshst
+#CHECK: dsb #0x1
+#CHECK: dsb #0x0
0xbf 0xf3 0x4f 0x8f
0xbf 0xf3 0x4e 0x8f
+0xbf 0xf3 0x4d 0x8f
+0xbf 0xf3 0x4c 0x8f
0xbf 0xf3 0x4b 0x8f
0xbf 0xf3 0x4a 0x8f
+0xbf 0xf3 0x49 0x8f
+0xbf 0xf3 0x48 0x8f
0xbf 0xf3 0x47 0x8f
0xbf 0xf3 0x46 0x8f
+0xbf 0xf3 0x45 0x8f
+0xbf 0xf3 0x44 0x8f
0xbf 0xf3 0x43 0x8f
0xbf 0xf3 0x42 0x8f
+0xbf 0xf3 0x41 0x8f
+0xbf 0xf3 0x40 0x8f
#------------------------------------------------------------------------------
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