[llvm-commits] [PATCH][Review Please] Optimize ARM Position Independent Code Generation

[Evan Cheng]

Thanks. This looks like a good change to ELF codegen. I am ok with the isel change.

However, I'm not ok with pre-ra load / store optimizer change. It's the wrong place to do it. MachineCSE should be eliminating the unnecessary PIC instructions. You might want to look at Darwin codegen and how it plays with MachineCSE.

Evan

On Aug 1, 2012, at 10:24 AM, Yin Ma <yinma at codeaurora.org> wrote:

> Hi Evan,
>  
> The attached pdf contains an example of this change. It can result
> In code size reduction for most of PIC enabled programs.
>  
> Thanks,
>  
>                               Yin
>  
> From: Evan Cheng [mailto:evan.cheng at apple.com] 
> Sent: Tuesday, July 31, 2012 5:48 PM
> To: Yin Ma
> Cc: llvm-commits at cs.uiuc.edu
> Subject: Re: [llvm-commits] [PATCH][Review Please] Optimize ARM Position Independent Code Generation
>  
> Hi Yin,
>  
> Can you provide some assembly code so we can understand what you are trying to do?
>  
> Thanks,
>  
> Evan
>  
> On Jul 30, 2012, at 10:55 AM, Yin Ma <yinma at codeaurora.org> wrote:
> 
> 
> Hi
> 
> Currently LLVM ARM backend is still using the x86 way to generate position independent code. The algorithm retrieves the pointer of global offset table at first. However, GCC has been using the label relative offset to computer position independent code. The GCC way results smaller code size in ARM architecture. This patch is to implement GCC way to generate position independent code.
> 
> In the attachment.
> pic.diff is the code patch
> the rest of four files are the test validation results before and after code changed
> 
> Please give a review
>  
> Thanks,
>  
>                     Yin
> <report.simple.new.txt><report.simple.org.txt><cross.new><cross.org><pic.diff>_______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>  
> <pic.pdf>

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