[llvm-commits] [llvm] r161066 - in /llvm/trunk: lib/Target/X86/X86RegisterInfo.cpp test/CodeGen/X86/force-align-stack-alloca.ll

[Chad Rosier]

Author: mcrosier
Date: Tue Jul 31 13:29:21 2012
New Revision: 161066

URL: http://llvm.org/viewvc/llvm-project?rev=161066&view=rev
Log:
[x86 frame lowering] In 32-bit mode, use ESI as the base pointer.

Previously, we were using EBX, but PIC requires the GOT to be in EBX before 
function calls via PLT GOT pointer.

Modified:
    llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp
    llvm/trunk/test/CodeGen/X86/force-align-stack-alloca.ll

Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp?rev=161066&r1=161065&r2=161066&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Tue Jul 31 13:29:21 2012
@@ -72,13 +72,15 @@
     SlotSize = 8;
     StackPtr = X86::RSP;
     FramePtr = X86::RBP;
-    BasePtr = X86::RBX;
   } else {
     SlotSize = 4;
     StackPtr = X86::ESP;
     FramePtr = X86::EBP;
-    BasePtr = X86::EBX;
   }
+  // Use a callee-saved register as the base pointer.  These registers must
+  // not conflict with any ABI requirements.  For example, in 32-bit mode PIC 
+  // requires GOT in the EBX register before function calls via PLT GOT pointer.
+  BasePtr = Is64Bit ? X86::RBX : X86::ESI;
 }
 
 /// getCompactUnwindRegNum - This function maps the register to the number for

Modified: llvm/trunk/test/CodeGen/X86/force-align-stack-alloca.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/force-align-stack-alloca.ll?rev=161066&r1=161065&r2=161066&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/force-align-stack-alloca.ll (original)
+++ llvm/trunk/test/CodeGen/X86/force-align-stack-alloca.ll Tue Jul 31 13:29:21 2012
@@ -24,8 +24,8 @@
 ; CHECK-NEXT: andl   $-32, %esp
 ; CHECK-NEXT: subl   $32, %esp
 ;
-; Now setup the base pointer (%ebx).
-; CHECK-NEXT: movl   %esp, %ebx
+; Now setup the base pointer (%esi).
+; CHECK-NEXT: movl   %esp, %esi
 ; CHECK-NOT:         {{[^ ,]*}}, %esp
 ;
 ; The next adjustment of the stack is due to the alloca.