[llvm-commits] [llvm] r160910 - /llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp

[Andrew Trick]

Author: atrick
Date: Fri Jul 27 20:48:15 2012
New Revision: 160910

URL: http://llvm.org/viewvc/llvm-project?rev=160910&view=rev
Log:
Reenable a basic SSA DAG builder optimization.

Jakob fixed ProcessImplicifDefs in r159149.

Modified:
    llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp

Modified: llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp?rev=160910&r1=160909&r2=160910&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp (original)
+++ llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp Fri Jul 27 20:48:15 2012
@@ -411,12 +411,11 @@
   const MachineInstr *MI = SU->getInstr();
   unsigned Reg = MI->getOperand(OperIdx).getReg();
 
-  // SSA defs do not have output/anti dependencies.
+  // Singly defined vregs do not have output/anti dependencies.
   // The current operand is a def, so we have at least one.
-  //
-  // FIXME: This optimization is disabled pending PR13112.
-  //if (llvm::next(MRI.def_begin(Reg)) == MRI.def_end())
-  //  return;
+  // Check here if there are any others...
+  if (llvm::next(MRI.def_begin(Reg)) == MRI.def_end())
+    return;
 
   // Add output dependence to the next nearest def of this vreg.
   //