[llvm-commits] [PATCH] Incorrect VFP version supporting ARM Cortex-M4

[Jiangning Liu]

For data load we can still use double float, so it is named as D16 rather than S16. S16 is only limited on arithmetic operation, so 'sp' is used in the name. The name fpv4-sp-d16 is a conjunctive result.

In arm.td, I see the code below,

// V7EM Processors.
def : ProcNoItin<"cortex-m4",       [HasV7Ops,
                                     FeatureThumb2, FeatureNoARM, FeatureDB,
                                     FeatureHWDiv, FeatureDSPThumb2,
                                     FeatureT2XtPk, FeatureVFP2,
                                     FeatureVFPOnlySP, FeatureMClass]>;

So FeatureVFPOnlySP should already be there. Did I misunderstand your point?

Thanks,
-Jiangning

在 2012-7-27，下午7:01，Renato Golin <rengolin at systemcall.org> 写道：

> On 27 July 2012 03:12, Jiangning Liu <jiangning.liu at arm.com> wrote:
>> Hopefully this can answer your question.
> 
> Maybe indirectly, it does. If I got it right, they're named
> differently (S16 vs. D32) to be able to do the same thing differently,
> though the major name (VFPv4) is the same, to allow us to infer that
> most instructions will be the same (single-precision ones, that is).
> 
> I think, from a global point of view, it's safe to assume S16 == (D32
> - double-precision instructions), and whatever difference can be coded
> as a new SP-only instruction, enabled by the FeatureVFPOnlySP flag.
> 
> Jiangning, from a historical point of view, I think it'd be safer to
> add the FeatureVFPOnlySP flag now, even if inactive, so that people
> don't assume anything when adding instructions to VFPv4. Jim, do you
> think that'd be overkill?
> 
> -- 
> cheers,
> --renato
> 
> http://systemcall.org/
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