[llvm-commits] [llvm] r160101 - in /llvm/trunk: lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp test/Transforms/InstCombine/2012-07-11-AddSubDemandedBits.ll

[Chris Lattner]

On Jul 13, 2012, at 2:33 AM, Nick Lewycky wrote:
> Evan Cheng wrote:
>> URL: http://llvm.org/viewvc/llvm-project?rev=160101&view=rev
>> Log:
>> Instcombine was transforming:
>>   %shr = lshr i64 %key, 3
>>   %0 = load i64* %val, align 8
>>   %sub = add i64 %0, -1
>>   %and = and i64 %sub, %shr
>>   ret i64 %and
>> 
>> to:
>>   %shr = lshr i64 %key, 3
>>   %0 = load i64* %val, align 8
>>   %sub = add i64 %0, 2305843009213693951
>>   %and = and i64 %sub, %shr
>>   ret i64 %and
>> 
>> The demanded bit optimization is actually a pessimization because add -1 would
>> be codegen'ed as a sub 1. Teach the demanded constant shrinking optimization
>> to check for negated constant to make sure it is actually reducing the width
>> of the constant.
> 
> I'm not a fan of this patch. Instead of just disabling the optz'n in 
> this case, we should have some way to transform things into the '%sub = 
> add i64 %0, -1' form, more generally.

I agree with Nick.  SelectionDAG should be able to handle this sort of thing - it already does handle matching and/or masks that have been simplified away.  Can't we use similar logic for subtract?

-Chris