[llvm-commits] [PATCH] Incorrect VFP version supporting ARM Cortex-M4

Jiangning Liu liujiangning1 at gmail.com
Sat Jul 14 08:16:02 PDT 2012


Jim,

VFMA/VFMS are missing for m4. These instructions is even not in vfpv3.
I added a change for test case vfp4.s as attached.

I know there are still other issues around sp only feature, so we may
get that problem fixed later on. But my current fix would be a
fundamental change to make sure m4 can support many vfpv3/vfpv4
instructions.

Thanks,
-Jiangning

2012/7/14 Jim Grosbach <grosbach at apple.com>:
> What is missing given the current definition? That is, what instructions should be available that are currently marked unavailable. Can you provide a test-case of an assembly file that should be legal for m4 that is currently rejected?
>
> -Jim
>
> On Jul 13, 2012, at 3:51 PM, Jiangning Liu <liujiangning1 at gmail.com> wrote:
>
>> Hi Jim,
>>
>> No, Cortex-M4 doesn't support full VFPv4, so you are right fpv4-sp-d16 is different from full VFPv4.
>>
>> 1) 'V' here implies vector instructions, while Cortex-M4 doesn't have.
>> 2) sp means SIngle Precision
>> 3) d16 means only 16-bit data operation only.
>>
>> This is why other attributes are specified for Cortex-M4 as well. I think FeatureVFPOnlySP is being used to make this difference.
>>
>> At least we can't say Cortex-M4 is VFPv2.
>>
>> Thanks,
>> -Jiangning
>>
>> 在 2012-7-14,上午1:09,Jim Grosbach <grosbach at apple.com> 写道:
>>
>>> VFP4 means something very different from VFP2. Does the M4 really have a full VFP4 implementation available?
>>>
>>> -Jim
>>>
>>> On Jul 13, 2012, at 1:17 AM, Jiangning Liu <jiangning.liu at arm.com> wrote:
>>>
>>>> Hi,
>>>>
>>>> The full name of FP version of ARM Cortex-M4 is fpv4-sp-d16, so the FP
>>>> version should be vfp4 rather than vfp2. This patch changes FeatureVFP2 to
>>>> FeatureVFP4 for Cortex-M4.
>>>>
>>>> Thanks,
>>>> -Jiangning
>>>>
>>>> diff --git a/lib/Target/ARM/ARM.td b/lib/Target/ARM/ARM.td
>>>> index cd3c0e0..69e2346 100644
>>>> --- a/lib/Target/ARM/ARM.td
>>>> +++ b/lib/Target/ARM/ARM.td
>>>> @@ -224,7 +224,7 @@ def : ProcNoItin<"cortex-m3",       [HasV7Ops,
>>>> def : ProcNoItin<"cortex-m4",       [HasV7Ops,
>>>>                                    FeatureThumb2, FeatureNoARM,
>>>> FeatureDB,
>>>>                                    FeatureHWDiv, FeatureDSPThumb2,
>>>> -                                     FeatureT2XtPk, FeatureVFP2,
>>>> +                                     FeatureT2XtPk, FeatureVFP4,
>>>>                                    FeatureVFPOnlySP, FeatureMClass]>;
>>>>
>>>>
>>>> //===----------------------------------------------------------------------=
>>>> ==//<cortex_m4_fpv4.patch>_______________________________________________
>>>> llvm-commits mailing list
>>>> llvm-commits at cs.uiuc.edu
>>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>>
>>> _______________________________________________
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>



-- 
Thanks,
-Jiangning
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