[llvm-commits] [llvm] r160143 - in /llvm/trunk/test/MC/Disassembler/Mips: mips32.txt mips32_le.txt mips32r2.txt mips32r2_le.txt mips64.txt mips64_le.txt mips64r2.txt mips64r2_le.txt

Akira Hatanaka ahatanaka at mips.com
Thu Jul 12 14:19:32 PDT 2012


Author: ahatanak
Date: Thu Jul 12 16:19:32 2012
New Revision: 160143

URL: http://llvm.org/viewvc/llvm-project?rev=160143&view=rev
Log:
Fix check strings in test/MC/Disassembler/Mips/* and run FileCheck.

Patch by Vladimir Medic.


Modified:
    llvm/trunk/test/MC/Disassembler/Mips/mips32.txt
    llvm/trunk/test/MC/Disassembler/Mips/mips32_le.txt
    llvm/trunk/test/MC/Disassembler/Mips/mips32r2.txt
    llvm/trunk/test/MC/Disassembler/Mips/mips32r2_le.txt
    llvm/trunk/test/MC/Disassembler/Mips/mips64.txt
    llvm/trunk/test/MC/Disassembler/Mips/mips64_le.txt
    llvm/trunk/test/MC/Disassembler/Mips/mips64r2.txt
    llvm/trunk/test/MC/Disassembler/Mips/mips64r2_le.txt

Modified: llvm/trunk/test/MC/Disassembler/Mips/mips32.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/Mips/mips32.txt?rev=160143&r1=160142&r2=160143&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/Mips/mips32.txt (original)
+++ llvm/trunk/test/MC/Disassembler/Mips/mips32.txt Thu Jul 12 16:19:32 2012
@@ -1,427 +1,406 @@
-# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux
-
-# CHECK: abs.d $f12,$f14
+# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux | FileCheck %s
+# CHECK: .section        __TEXT,__text,regular,pure_instructions
+# CHECK: abs.d $f12, $f14
 0x46 0x20 0x73 0x05
 
-# CHECK: abs.s $f6,$f7
+# CHECK: abs.s $f6, $f7
 0x46 0x00 0x39 0x85
 
-# CHECK: add t1,a2,a3
+# CHECK: add $9, $6, $7
 0x00 0xc7 0x48 0x20
 
-# CHECK: add.d $f8,$f12,$f14
+# CHECK: add.d $f8, $f12, $f14
 0x46 0x2e 0x62 0x00
 
-# CHECK: add.s $f9,$f6,$f7
+# CHECK: add.s $f9, $f6, $f7
 0x46 0x07 0x32 0x40
 
-# CHECK: addi t1,a2,17767
+# CHECK: addi $9, $6, 17767
 0x20 0xc9 0x45 0x67
 
-# CHECK: addiu t1,a2,-15001
+# CHECK: addiu $9, $6, -15001
 0x24 0xc9 0xc5 0x67
 
-# CHECK: addu t1,a2,a3
+# CHECK: addu $9, $6, $7
 0x00 0xc7 0x48 0x21
 
-# CHECK: and t1,a2,a3
+# CHECK: and $9, $6, $7
 0x00 0xc7 0x48 0x24
 
-# CHECK: andi t1,a2,0x4567
+# CHECK: andi $9, $6, 17767
 0x30 0xc9 0x45 0x67
 
-# CHECK: b 00000534
+# CHECK: b 1332
 0x10 0x00 0x01 0x4c
 
-# CHECK: bal 00000534
-0x04 0x11 0x01 0x4c
-
-# CHECK: bc1f 00000534
+# CHECK: bc1f 1332
 0x45 0x00 0x01 0x4c
 
-# CHECK: bc1t 00000534
+# CHECK: bc1t 1332
 0x45 0x01 0x01 0x4c
 
-# CHECK: beq t1,a2,00000534
+# CHECK: beq $9, $6, 1332
 0x11 0x26 0x01 0x4c
 
-# CHECK: bgez a2,00000534
+# CHECK: bgez  $6, 1332
 0x04 0xc1 0x01 0x4c
 
-# CHECK: bgezal a2,00000534
+# CHECK: bgezal  $6, 1332
 0x04 0xd1 0x01 0x4c
 
-# CHECK: bgtz a2,00000534
+# CHECK: bgtz  $6, 1332
 0x1c 0xc0 0x01 0x4c
 
-# CHECK: blez a2,00000534
+# CHECK: blez  $6, 1332
 0x18 0xc0 0x01 0x4c
 
-# CHECK: bne t1,a2,00000534
+# CHECK: bne $9, $6, 1332
 0x15 0x26 0x01 0x4c
 
-# CHECK: c.eq.d $f12,$f14
+# CHECK: c.eq.d $f12, $f14
 0x46 0x2e 0x60 0x32
 
-# CHECK: c.eq.s $f6,$f7
+# CHECK: c.eq.s $f6, $f7
 0x46 0x07 0x30 0x32
 
-# CHECK: c.f.d $f12,$f14
+# CHECK: c.f.d $f12, $f14
 0x46 0x2e 0x60 0x30
 
-# CHECK: c.f.s $f6,$f7
+# CHECK: c.f.s $f6, $f7
 0x46 0x07 0x30 0x30
 
-# CHECK: c.le.d $f12,$f14
+# CHECK: c.le.d $f12, $f14
 0x46 0x2e 0x60 0x3e
 
-# CHECK: c.le.s $f6,$f7
+# CHECK: c.le.s $f6, $f7
 0x46 0x07 0x30 0x3e
 
-# CHECK: c.lt.d $f12,$f14
+# CHECK: c.lt.d $f12, $f14
 0x46 0x2e 0x60 0x3c
 
-# CHECK: c.lt.s $f6,$f7
+# CHECK: c.lt.s $f6, $f7
 0x46 0x07 0x30 0x3c
 
-# CHECK: c.nge.d $f12,$f14
+# CHECK: c.nge.d $f12, $f14
 0x46 0x2e 0x60 0x3d
 
-# CHECK: c.nge.s $f6,$f7
+# CHECK: c.nge.s $f6, $f7
 0x46 0x07 0x30 0x3d
 
-# CHECK: c.ngl.d $f12,$f14
+# CHECK: c.ngl.d $f12, $f14
 0x46 0x2e 0x60 0x3b
 
-# CHECK: c.ngl.s $f6,$f7
+# CHECK: c.ngl.s $f6, $f7
 0x46 0x07 0x30 0x3b
 
-# CHECK: c.ngle.d $f12,$f14
+# CHECK: c.ngle.d $f12, $f14
 0x46 0x2e 0x60 0x39
 
-# CHECK: c.ngle.s $f6,$f7
+# CHECK: c.ngle.s $f6, $f7
 0x46 0x07 0x30 0x39
 
-# CHECK: c.ngt.d $f12,$f14
+# CHECK: c.ngt.d $f12, $f14
 0x46 0x2e 0x60 0x3f
 
-# CHECK: c.ngt.s $f6,$f7
+# CHECK: c.ngt.s $f6, $f7
 0x46 0x07 0x30 0x3f
 
-# CHECK: c.ole.d $f12,$f14
+# CHECK: c.ole.d $f12, $f14
 0x46 0x2e 0x60 0x36
 
-# CHECK: c.ole.s $f6,$f7
+# CHECK: c.ole.s $f6, $f7
 0x46 0x07 0x30 0x36
 
-# CHECK: c.olt.d $f12,$f14
+# CHECK: c.olt.d $f12, $f14
 0x46 0x2e 0x60 0x34
 
-# CHECK: c.olt.s $f6,$f7
+# CHECK: c.olt.s $f6, $f7
 0x46 0x07 0x30 0x34
 
-# CHECK: c.seq.d $f12,$f14
+# CHECK: c.seq.d $f12, $f14
 0x46 0x2e 0x60 0x3a
 
-# CHECK: c.seq.s $f6,$f7
+# CHECK: c.seq.s $f6, $f7
 0x46 0x07 0x30 0x3a
 
-# CHECK: c.sf.d $f12,$f14
+# CHECK: c.sf.d $f12, $f14
 0x46 0x2e 0x60 0x38
 
-# CHECK: c.sf.s $f6,$f7
+# CHECK: c.sf.s $f6, $f7
 0x46 0x07 0x30 0x38
 
-# CHECK: c.ueq.d $f12,$f14
+# CHECK: c.ueq.d $f12, $f14
 0x46 0x2e 0x60 0x33
 
-# CHECK: c.ueq.s $f28,$f18
+# CHECK: c.ueq.s $f28, $f18
 0x46 0x12 0xe0 0x33
 
-# CHECK: c.ule.d $f12,$f14
+# CHECK: c.ule.d $f12, $f14
 0x46 0x2e 0x60 0x37
 
-# CHECK: c.ule.s $f6,$f7
+# CHECK: c.ule.s $f6, $f7
 0x46 0x07 0x30 0x37
 
-# CHECK: c.ult.d $f12,$f14
+# CHECK: c.ult.d $f12, $f14
 0x46 0x2e 0x60 0x35
 
-# CHECK: c.ult.s $f6,$f7
+# CHECK: c.ult.s $f6, $f7
 0x46 0x07 0x30 0x35
 
-# CHECK: c.un.d $f12,$f14
+# CHECK: c.un.d $f12, $f14
 0x46 0x2e 0x60 0x31
 
-# CHECK: c.un.s $f6,$f7
+# CHECK: c.un.s $f6, $f7
 0x46 0x07 0x30 0x31
 
-# CHECK: ceil.w.d $f12,$f14
+# CHECK: ceil.w.d $f12, $f14
 0x46 0x20 0x73 0x0e
 
-# CHECK: ceil.w.s $f6,$f7
+# CHECK: ceil.w.s $f6, $f7
 0x46 0x00 0x39 0x8e
 
-# CHECK: cfc1 a2,$7
+# CHECK: cfc1  $6, $7
 0x44 0x46 0x38 0x00
 
-# CHECK: clo a2,a3
+# CHECK: clo  $6, $7
 0x70 0xe6 0x30 0x21
 
-# CHECK: clz a2,a3
+# CHECK: clz  $6, $7
 0x70 0xe6 0x30 0x20
 
-# CHECK: ctc1 a2,$7
+# CHECK: ctc1  $6, $7
 0x44 0xc6 0x38 0x00
 
-# CHECK: cvt.d.s $f6,$f7
+# CHECK: cvt.d.s $f6, $f7
 0x46 0x00 0x39 0xa1
 
-# CHECK: cvt.d.w $f12,$f14
+# CHECK: cvt.d.w $f12, $f14
 0x46 0x80 0x73 0x21
 
-# CHECK: cvt.s.d $f12,$f14
+# CHECK: cvt.s.d $f12, $f14
 0x46 0x20 0x73 0x20
 
-# CHECK: cvt.s.w $f6,$f7
+# CHECK: cvt.s.w $f6, $f7
 0x46 0x80 0x39 0xa0
 
-# CHECK: cvt.w.d $f12,$f14
+# CHECK: cvt.w.d $f12, $f14
 0x46 0x20 0x73 0x24
 
-# CHECK: cvt.w.s $f6,$f7
+# CHECK: cvt.w.s $f6, $f7
 0x46 0x00 0x39 0xa4
 
-# CHECK: floor.w.d $f12,$f14
+# CHECK: floor.w.d $f12, $f14
 0x46 0x20 0x73 0x0f
 
-# CHECK: floor.w.s $f6,$f7
+# CHECK: floor.w.s $f6, $f7
 0x46 0x00 0x39 0x8f
 
-# CHECK: j 00000530
+# CHECK: j 1328
 0x08 0x00 0x01 0x4c
 
-# CHECK: jal 00000530
+# CHECK: jal 1328
 0x0c 0x00 0x01 0x4c
 
-# CHECK: jalr a2,a3
+# CHECK: jalr  $7
 0x00 0xe0 0xf8 0x09
 
-# CHECK: jr a3
+# CHECK: jr  $7
 0x00 0xe0 0x00 0x08
 
-# CHECK: lb  a0,9158(a1)
+# CHECK: lb  $4, 9158($5)
 0x80 0xa4 0x23 0xc6
 
-# CHECK: lbu a0,6(a1)
+# CHECK: lbu $4, 6($5)
 0x90 0xa4 0x00 0x06
 
-# CHECK: ldc1  $f9,9158(a3)
+# CHECK: ldc1  $f9, 9158($7)
 0xd4 0xe9 0x23 0xc6
 
-# CHECK: lh  a0,12(a1)
+# CHECK: lh  $4, 12($5)
 0x84 0xa4 0x00 0x0c
 
-# CHECK: lh  a0,12(a1)
+# CHECK: lh  $4, 12($5)
 0x84 0xa4 0x00 0x0c
 
-# CHECK: li  v1,17767
-0x24 0x03 0x45 0x67
-
-# CHECK: ll  t1,9158(a3)
+# CHECK: ll  $9, 9158($7)
 0xc0 0xe9 0x23 0xc6
 
-# CHECK: lui a2,0x4567
+# CHECK: lui  $6, 17767
 0x3c 0x06 0x45 0x67
 
-# CHECK: lw  a0,24(a1)
+# CHECK: lw  $4, 24($5)
 0x8c 0xa4 0x00 0x18
 
-# CHECK: lwc1  $f9,9158(a3)
+# CHECK: lwc1  $f9, 9158($7)
 0xc4 0xe9 0x23 0xc6
 
-# CHECK: lwl   $v0, 3($a0)
+# CHECK: lwl   $2,  3($4)
 0x88 0x82 0x00 0x03
 
-# CHECK: lwr   $v1,16($a1)
+# CHECK: lwr   $3, 16($5)
 0x98 0xa3 0x00 0x10
 
-# CHECK: madd  a2,a3
+# CHECK: madd   $6,  $7
 0x70 0xc7 0x00 0x00
 
-# CHECK: maddu a2,a3
+# CHECK: maddu  $6,  $7
 0x70 0xc7 0x00 0x01
 
-# CHECK: mfc1  a2,$f7
+# CHECK: mfc1   $6, $f7
 0x44 0x06 0x38 0x00
 
-# CHECK: mfhi  a1
+# CHECK: mfhi  $5
 0x00 0x00 0x28 0x10
 
-# CHECK: mflo  a1
+# CHECK: mflo  $5
 0x00 0x00 0x28 0x12
 
-# CHECK: mov.d $f6,$f8
+# CHECK: mov.d $f6, $f8
 0x46 0x20 0x41 0x86
 
-# CHECK: mov.s $f6,$f7
+# CHECK: mov.s $f6, $f7
 0x46 0x00 0x39 0x86
 
-# CHECK: move  a2,a1
-0x00 0xa0 0x30 0x21
-
-# CHECK: msub  a2,a3
+# CHECK: msub   $6,  $7
 0x70 0xc7 0x00 0x04
 
-# CHECK: msubu a2,a3
+# CHECK: msubu  $6,  $7
 0x70 0xc7 0x00 0x05
 
-# CHECK: mtc1  a2,$f7
+# CHECK: mtc1   $6, $f7
 0x44 0x86 0x38 0x00
 
-# CHECK: mthi  a3
+# CHECK: mthi   $7
 0x00 0xe0 0x00 0x11
 
-# CHECK: mtlo  a3
+# CHECK: mtlo   $7
 0x00 0xe0 0x00 0x13
 
-# CHECK: mul.d $f8,$f12,$f14
+# CHECK: mul.d $f8, $f12, $f14
 0x46 0x2e 0x62 0x02
 
-# CHECK: mul.s $f9,$f6,$f7
+# CHECK: mul.s $f9, $f6, $f7
 0x46 0x07 0x32 0x42
 
-# CHECK: mul t1,a2,a3
+# CHECK: mul $9,  $6,  $7
 0x70 0xc7 0x48 0x02
 
-# CHECK: mult  v1,a1
+# CHECK: mult  $3, $5
 0x00 0x65 0x00 0x18
 
-# CHECK: multu v1,a1
+# CHECK: multu $3, $5
 0x00 0x65 0x00 0x19
 
-# CHECK: neg.d $f12,$f14
+# CHECK: neg.d $f12, $f14
 0x46 0x20 0x73 0x07
 
-# CHECK: neg.s $f6,$f7
+# CHECK: neg.s $f6, $f7
 0x46 0x00 0x39 0x87
 
-# CHECK: neg v1,a1
-0x00 0x05 0x18 0x22
-
 # CHECK: nop
 0x00 0x00 0x00 0x00
 
-# CHECK: nor t1,a2,a3
+# CHECK: nor $9,  $6, $7
 0x00 0xc7 0x48 0x27
 
-# CHECK: not v1,a1
-0x00 0xa0 0x18 0x27
-
-# CHECK: or  v1,v1,a1
+# CHECK: or  $3, $3, $5
 0x00 0x65 0x18 0x25
 
-# CHECK: ori t1,a2,0x4567
+# CHECK: ori $9,  $6, 17767
 0x34 0xc9 0x45 0x67
 
-# CHECK: rdhwr a2,$29
-0x7c 0x06 0xe8 0x3b
-
-# CHECK: round.w.d $f6,$f14
+# CHECK: round.w.d $f12, $f14
 0x46 0x20 0x73 0x0c
 
-# CHECK: round.w.s $f6,$f7
+# CHECK: round.w.s $f6, $f7
 0x46 0x00 0x39 0x8c
 
-# CHECK: sb  a0,9158(a1)
+# CHECK: sb  $4, 9158($5)
 0xa0 0xa4 0x23 0xc6
 
-# CHECK: sb  a0,6(a1)
+# CHECK: sb  $4, 6($5)
 0xa0 0xa4 0x00 0x06
 
-# CHECK: sc  t1,9158(a3)
+# CHECK: sc  $9, 9158($7)
 0xe0 0xe9 0x23 0xc6
 
-# CHECK: sdc1  $f9,9158(a3)
+# CHECK: sdc1  $f9, 9158($7)
 0xf4 0xe9 0x23 0xc6
 
-# CHECK: sh  a0,9158(a1)
+# CHECK: sh  $4, 9158($5)
 0xa4 0xa4 0x23 0xc6
 
-# CHECK: sll a0,v1,0x7
+# CHECK: sll $4, $3, 7
 0x00 0x03 0x21 0xc0
 
-# CHECK: sllv  v0,v1,a1
+# CHECK: sllv  $2, $3, $5
 0x00 0xa3 0x10 0x04
 
-# CHECK: slt v1,v1,a1
+# CHECK: slt $3, $3, $5
 0x00 0x65 0x18 0x2a
 
-# CHECK: slti  v1,v1,103
+# CHECK: slti  $3, $3, 103
 0x28 0x63 0x00 0x67
 
-# CHECK: sltiu v1,v1,103
+# CHECK: sltiu $3, $3, 103
 0x2c 0x63 0x00 0x67
 
-# CHECK: sltu  v1,v1,a1
+# CHECK: sltu  $3, $3, $5
 0x00 0x65 0x18 0x2b
 
-# CHECK: sqrt.d  $f12,$f14
+# CHECK: sqrt.d  $f12, $f14
 0x46 0x20 0x73 0x04
 
-# CHECK: sqrt.s  $f6,$f7
+# CHECK: sqrt.s  $f6, $f7
 0x46 0x00 0x39 0x84
 
-# CHECK: sra a0,v1,0x7
-0x00 0x03 0x21 0xc3
-
-# CHECK: sra a0,v1,0x7
+# CHECK: sra $4, $3, 7
 0x00 0x03 0x21 0xc3
 
-# CHECK: srav  v0,v1,a1
+# CHECK: srav  $2, $3, $5
 0x00 0xa3 0x10 0x07
 
-# CHECK: srl a0,v1,0x7
+# CHECK: srl $4, $3, 7
 0x00 0x03 0x21 0xc2
 
-# CHECK: srlv  v0,v1,a1
+# CHECK: srlv  $2, $3, $5
 0x00 0xa3 0x10 0x06
 
-# CHECK: sub.d $f8,$f12,$f14
+# CHECK: sub.d $f8, $f12, $f14
 0x46 0x2e 0x62 0x01
 
-# CHECK: sub.s $f9,$f6,$f7
+# CHECK: sub.s $f9, $f6, $f7
 0x46 0x07 0x32 0x41
 
-# CHECK: sub t1,a2,a3
+# CHECK: sub $9,  $6, $7
 0x00 0xc7 0x48 0x22
 
-# CHECK: subu  a0,v1,a1
+# CHECK: subu  $4, $3, $5
 0x00 0x65 0x20 0x23
 
-# CHECK: sw  a0,24(a1)
+# CHECK: sw  $4, 24($5)
 0xac 0xa4 0x00 0x18
 
-# CHECK: swc1  $f9,9158(a3)
+# CHECK: swc1  $f9, 9158($7)
 0xe4 0xe9 0x23 0xc6
 
-# CHECK: swl $a0, 16($a1)
+# CHECK: swl $4,  16($5)
 0xa8 0xa4 0x00 0x10
 
-# CHECK: swr $a2, 16($a3)
+# CHECK: swr $6, 16($7)
 0xb8 0xe6 0x00 0x10
 
-# CHECK: sync  0x7
+# CHECK: sync  7
 0x00 0x00 0x01 0xcf
 
-# CHECK: trunc.w.d $f12,$f14
+# CHECK: trunc.w.d $f12, $f14
 0x46 0x20 0x73 0x0d
 
-# CHECK: trunc.w.s $f6,$f7
+# CHECK: trunc.w.s $f6, $f7
 0x46 0x00 0x39 0x8d
 
-# CHECK: xor v1,v1,a1
+# CHECK: xor $3, $3, $5
 0x00 0x65 0x18 0x26
 
-# CHECK: xori  t1,a2,0x4567
+# CHECK: xori  $9,  $6, 17767
 0x38 0xc9 0x45 0x67

Modified: llvm/trunk/test/MC/Disassembler/Mips/mips32_le.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/Mips/mips32_le.txt?rev=160143&r1=160142&r2=160143&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/Mips/mips32_le.txt (original)
+++ llvm/trunk/test/MC/Disassembler/Mips/mips32_le.txt Thu Jul 12 16:19:32 2012
@@ -1,430 +1,406 @@
-# RUN: llvm-mc --disassemble %s -triple=mipsel-unknown-linux
-
-# CHECK: abs.d $f12,$f14
+# RUN: llvm-mc --disassemble %s -triple=mipsel-unknown-linux | FileCheck %s
+# CHECK: .section        __TEXT,__text,regular,pure_instructions
+# CHECK: abs.d $f12, $f14
 0x05 0x73 0x20 0x46
 
-# CHECK: abs.s $f6,$f7
+# CHECK: abs.s $f6, $f7
 0x85 0x39 0x00 0x46
 
-# CHECK: add t1,a2,a3
+# CHECK: add $9, $6, $7
 0x20 0x48 0xc7 0x00
 
-# CHECK: add.d $8,$f12,$f14
+# CHECK: add.d $f8, $f12, $f14
 0x00 0x62 0x2e 0x46
 
-# CHECK: add.s $f9,$f6,$f7
+# CHECK: add.s $f9, $f6, $f7
 0x40 0x32 0x07 0x46
 
-# CHECK: addi t1,a2,17767
+# CHECK: addi $9, $6, 17767
 0x67 0x45 0xc9 0x20
 
-# CHECK: addiu t1,a2,-15001
+# CHECK: addiu $9, $6, -15001
 0x67 0xc5 0xc9 0x24
 
-# CHECK: addu t1,a2,a3
+# CHECK: addu $9, $6, $7
 0x21 0x48 0xc7 0x00
 
-# CHECK: and t1,a2,a3
+# CHECK: and $9, $6, $7
 0x24 0x48 0xc7 0x00
 
-# CHECK: andi t1,a2,0x4567
+# CHECK: andi $9, $6, 17767
 0x67 0x45 0xc9 0x30
 
-# CHECK: b 00000534
+# CHECK: b 1332
 0x4c 0x01 0x00 0x10
 
-# CHECK: bal 00000534
-0x4c 0x01 0x11 0x04
-
-# CHECK: bc1f 00000534
+# CHECK: bc1f 1332
 0x4c 0x01 0x00 0x45
 
-# CHECK: bc1t 00000534
+# CHECK: bc1t 1332
 0x4c 0x01 0x01 0x45
 
-# CHECK: beq t1,a2,00000534
+# CHECK: beq $9, $6, 1332
 0x4c 0x01 0x26 0x11
 
-# CHECK: bgez a2,00000534
+# CHECK: bgez  $6, 1332
 0x4c 0x01 0xc1 0x04
 
-# CHECK: bgezal a2,00000534
+# CHECK: bgezal  $6, 1332
 0x4c 0x01 0xd1 0x04
 
-# CHECK: bgtz a2,00000534
+# CHECK: bgtz  $6, 1332
 0x4c 0x01 0xc0 0x1c
 
-# CHECK: blez a2,00000534
+# CHECK: blez  $6, 1332
 0x4c 0x01 0xc0 0x18
 
-# CHECK: bne t1,a2,00000534
+# CHECK: bne $9, $6, 1332
 0x4c 0x01 0x26 0x15
 
-# CHECK: c.eq.d $f12,$f14
+# CHECK: c.eq.d $f12, $f14
 0x32 0x60 0x2e 0x46
 
-# CHECK: c.eq.s $f6,$f7
+# CHECK: c.eq.s $f6, $f7
 0x32 0x30 0x07 0x46
 
-# CHECK: c.f.d $f12,$f14
+# CHECK: c.f.d $f12, $f14
 0x30 0x60 0x2e 0x46
 
-# CHECK: c.f.s $f6,$f7
+# CHECK: c.f.s $f6, $f7
 0x30 0x30 0x07 0x46
 
-# CHECK: c.le.d $f12,$f14
+# CHECK: c.le.d $f12, $f14
 0x3e 0x60 0x2e 0x46
 
-# CHECK: c.le.s $f6,$f7
+# CHECK: c.le.s $f6, $f7
 0x3e 0x30 0x07 0x46
 
-# CHECK: c.lt.d $f12,$f14
+# CHECK: c.lt.d $f12, $f14
 0x3c 0x60 0x2e 0x46
 
-# CHECK: c.lt.s $f6,$f7
+# CHECK: c.lt.s $f6, $f7
 0x3c 0x30 0x07 0x46
 
-# CHECK: c.nge.d $f12,$f14
+# CHECK: c.nge.d $f12, $f14
 0x3d 0x60 0x2e 0x46
 
-# CHECK: c.nge.s $f6,$f7
+# CHECK: c.nge.s $f6, $f7
 0x3d 0x30 0x07 0x46
 
-# CHECK: c.ngl.d $f12,$f14
+# CHECK: c.ngl.d $f12, $f14
 0x3b 0x60 0x2e 0x46
 
-# CHECK: c.ngl.s $f6,$f7
+# CHECK: c.ngl.s $f6, $f7
 0x3b 0x30 0x07 0x46
 
-# CHECK: c.ngle.d $f12,$f14
+# CHECK: c.ngle.d $f12, $f14
 0x39 0x60 0x2e 0x46
 
-# CHECK: c.ngle.s $f6,$f7
+# CHECK: c.ngle.s $f6, $f7
 0x39 0x30 0x07 0x46
 
-# CHECK: c.ngt.d $f12,$f14
+# CHECK: c.ngt.d $f12, $f14
 0x3f 0x60 0x2e 0x46
 
-# CHECK: c.ngt.s $f6,$f7
+# CHECK: c.ngt.s $f6, $f7
 0x3f 0x30 0x07 0x46
 
-# CHECK: c.ole.d $f12,$f14
+# CHECK: c.ole.d $f12, $f14
 0x36 0x60 0x2e 0x46
 
-# CHECK: c.ole.s $f6,$f7
+# CHECK: c.ole.s $f6, $f7
 0x36 0x30 0x07 0x46
 
-# CHECK: c.olt.d $f12,$f14
+# CHECK: c.olt.d $f12, $f14
 0x34 0x60 0x2e 0x46
 
-# CHECK: c.olt.s $f6,$f7
+# CHECK: c.olt.s $f6, $f7
 0x34 0x30 0x07 0x46
 
-# CHECK: c.seq.d $f12,$f14
+# CHECK: c.seq.d $f12, $f14
 0x3a 0x60 0x2e 0x46
 
-# CHECK: c.seq.s $f6,$f7
+# CHECK: c.seq.s $f6, $f7
 0x3a 0x30 0x07 0x46
 
-# CHECK: c.sf.d $f12,$f14
+# CHECK: c.sf.d $f12, $f14
 0x38 0x60 0x2e 0x46
 
-# CHECK: c.sf.s $f6,$f7
+# CHECK: c.sf.s $f6, $f7
 0x38 0x30 0x07 0x46
 
-# CHECK: c.ueq.d $f12,$f14
+# CHECK: c.ueq.d $f12, $f14
 0x33 0x60 0x2e 0x46
 
-# CHECK: c.ueq.s $f28,$f18
+# CHECK: c.ueq.s $f28, $f18
 0x33 0xe0 0x12 0x46
 
-# CHECK: c.ule.d $f12,$f14
+# CHECK: c.ule.d $f12, $f14
 0x37 0x60 0x2e 0x46
 
-# CHECK: c.ule.s $f6,$f7
+# CHECK: c.ule.s $f6, $f7
 0x37 0x30 0x07 0x46
 
-# CHECK: c.ult.d $f12,$f14
+# CHECK: c.ult.d $f12, $f14
 0x35 0x60 0x2e 0x46
 
-# CHECK: c.ult.s $f6,$f7
+# CHECK: c.ult.s $f6, $f7
 0x35 0x30 0x07 0x46
 
-# CHECK: c.un.d $f12,$f14
+# CHECK: c.un.d $f12, $f14
 0x31 0x60 0x2e 0x46
 
-# CHECK: c.un.s $f6,$f7
+# CHECK: c.un.s $f6, $f7
 0x31 0x30 0x07 0x46
 
-# CHECK: ceil.w.d $f12,$f14
+# CHECK: ceil.w.d $f12, $f14
 0x0e 0x73 0x20 0x46
 
-# CHECK: ceil.w.s $f6,$f7
-0x0e 0x73 0x20 0x46
+# CHECK: ceil.w.s $f6, $f7
+0x8e 0x39 0x00 0x46
 
-# CHECK: cfc1 a2,$7
+# CHECK: cfc1  $6, $7
 0x00 0x38 0x46 0x44
 
-# CHECK: clo a2,a3
+# CHECK: clo  $6, $7
 0x21 0x30 0xe6 0x70
 
-# CHECK: clz a2,a3
+# CHECK: clz  $6, $7
 0x20 0x30 0xe6 0x70
 
-# CHECK: ctc1 a2,$7
+# CHECK: ctc1  $6, $7
 0x00 0x38 0xc6 0x44
 
-# CHECK: cvt.d.s $f6,$f7
+# CHECK: cvt.d.s $f6, $f7
 0xa1 0x39 0x00 0x46
 
-# CHECK: cvt.d.w $f12,$f14
+# CHECK: cvt.d.w $f12, $f14
 0x21 0x73 0x80 0x46
 
-# CHECK: cvt.s.d $f12,$f14
+# CHECK: cvt.s.d $f12, $f14
 0x20 0x73 0x20 0x46
 
-# CHECK: cvt.s.w $f6,$f7
+# CHECK: cvt.s.w $f6, $f7
 0xa0 0x39 0x80 0x46
 
-# CHECK: cvt.w.d $f12,$f14
+# CHECK: cvt.w.d $f12, $f14
 0x24 0x73 0x20 0x46
 
-# CHECK: cvt.w.s $f6,$f7
+# CHECK: cvt.w.s $f6, $f7
 0xa4 0x39 0x00 0x46
 
-# CHECK: floor.w.d $f12,$f14
+# CHECK: floor.w.d $f12, $f14
 0x0f 0x73 0x20 0x46
 
-# CHECK: floor.w.s $f6,$f7
+# CHECK: floor.w.s $f6, $f7
 0x8f 0x39 0x00 0x46
 
-# CHECK: j 00000530
+# CHECK: j 1328
 0x4c 0x01 0x00 0x08
 
-# CHECK: jal 00000530
+# CHECK: jal 1328
 0x4c 0x01 0x00 0x0c
 
-# CHECK: jalr a3
+# CHECK: jalr  $7
 0x09 0xf8 0xe0 0x00
 
-# CHECK: jr a3
+# CHECK: jr  $7
 0x08 0x00 0xe0 0x00
 
-# CHECK: lb  a0,9158(a1)
+# CHECK: lb  $4, 9158($5)
 0xc6 0x23 0xa4 0x80
 
-# CHECK: lbu a0,6(a1)
+# CHECK: lbu $4, 6($5)
 0x06 0x00 0xa4 0x90
 
-# CHECK: ldc1  $f9,9158(a3)
+# CHECK: ldc1  $f9, 9158($7)
 0xc6 0x23 0xe9 0xd4
 
-# CHECK: lh  a0,12(a1)
+# CHECK: lh  $4, 12($5)
 0x0c 0x00 0xa4 0x84
 
-# CHECK: lh  a0,12(a1)
+# CHECK: lh  $4, 12($5)
 0x0c 0x00 0xa4 0x84
 
-# CHECK: li  v1,17767
-0x67 0x45 0x03 0x24
-
-# CHECK: ll  t1,9158(a3)
+# CHECK: ll  $9, 9158($7)
 0xc6 0x23 0xe9 0xc0
 
-# CHECK: lui a2,0x4567
+# CHECK: lui  $6, 17767
 0x67 0x45 0x06 0x3c
 
-# CHECK: lw  a0,24(a1)
+# CHECK: lw  $4, 24($5)
 0x18 0x00 0xa4 0x8c
 
-# CHECK lw at,-18316(v0)
-0x74 0xb8 0x41 0x8c
-
-# CHECK: lwc1  $f9,9158(a3)
+# CHECK: lwc1  $f9, 9158($7)
 0xc6 0x23 0xe9 0xc4
 
-# CHECK: lwl   $v0, 3($a0)
+# CHECK: lwl   $2,  3($4)
 0x03 0x00 0x82 0x88
 
-# CHECK: lwr   $v1,16($a1)
+# CHECK: lwr   $3, 16($5)
 0x10 0x00 0xa3 0x98
 
-# CHECK: madd  a2,a3
+# CHECK: madd   $6,  $7
 0x00 0x00 0xc7 0x70
 
-# CHECK: maddu a2,a3
+# CHECK: maddu  $6,  $7
 0x01 0x00 0xc7 0x70
 
-# CHECK: mfc1  a2,$f7
+# CHECK: mfc1   $6, $f7
 0x00 0x38 0x06 0x44
 
-# CHECK: mfhi  a1
+# CHECK: mfhi  $5
 0x10 0x28 0x00 0x00
 
-# CHECK: mflo  a1
+# CHECK: mflo  $5
 0x12 0x28 0x00 0x00
 
-# CHECK: mov.d $f6,$f8
+# CHECK: mov.d $f6, $f8
 0x86 0x41 0x20 0x46
 
-# CHECK: mov.s $f6,$f7
+# CHECK: mov.s $f6, $f7
 0x86 0x39 0x00 0x46
 
-# CHECK: move  a2,a1
-0x21 0x30 0xa0 0x00
-
-# CHECK: msub  a2,a3
+# CHECK: msub   $6,  $7
 0x04 0x00 0xc7 0x70
 
-# CHECK: msubu a2,a3
+# CHECK: msubu  $6,  $7
 0x05 0x00 0xc7 0x70
 
-# CHECK: mtc1  a2,$f7
+# CHECK: mtc1   $6, $f7
 0x00 0x38 0x86 0x44
 
-# CHECK: mthi  a3
+# CHECK: mthi   $7
 0x11 0x00 0xe0 0x00
 
-# CHECK: mtlo  a3
+# CHECK: mtlo   $7
 0x13 0x00 0xe0 0x00
 
-# CHECK: mul.d $f8,$f12,$f14
+# CHECK: mul.d $f8, $f12, $f14
 0x02 0x62 0x2e 0x46
 
-# CHECK: mul.s $f9,$f6,$f7
-0x02 0x62 0x07 0x46
+# CHECK: mul.s $f9, $f6, $f7
+0x42 0x32 0x07 0x46
 
-# CHECK: mul t1,a2,a3
+# CHECK: mul $9,  $6,  $7
 0x02 0x48 0xc7 0x70
 
-# CHECK: mult  v1,a1
+# CHECK: mult  $3, $5
 0x18 0x00 0x65 0x00
 
-# CHECK: multu v1,a1
+# CHECK: multu $3, $5
 0x19 0x00 0x65 0x00
 
-# CHECK: neg.d $f12,$f14
+# CHECK: neg.d $f12, $f14
 0x07 0x73 0x20 0x46
 
-# CHECK: neg.s $f6,$f7
+# CHECK: neg.s $f6, $f7
 0x87 0x39 0x00 0x46
 
-# CHECK: neg v1,a1
-0x22 0x18 0x05 0x00
-
 # CHECK: nop
 0x00 0x00 0x00 0x00
 
-# CHECK: nor t1,a2,a3
+# CHECK: nor $9,  $6, $7
 0x27 0x48 0xc7 0x00
 
-# CHECK: not v1,a1
-0x27 0x18 0xa0 0x00
-
-# CHECK: or  v1,v1,a1
+# CHECK: or  $3, $3, $5
 0x25 0x18 0x65 0x00
 
-# CHECK: ori t1,a2,0x4567
+# CHECK: ori $9,  $6, 17767
 0x67 0x45 0xc9 0x34
 
-# CHECK: rdhwr a2,$29
-0x3b 0xe8 0x06 0x7c
-
-# CHECK: round.w.d $f12,$f14
+# CHECK: round.w.d $f12, $f14
 0x0c 0x73 0x20 0x46
 
-# CHECK: round.w.s $f6,$f7
+# CHECK: round.w.s $f6, $f7
 0x8c 0x39 0x00 0x46
 
-# CHECK: sb  a0,9158(a1)
+# CHECK: sb  $4, 9158($5)
 0xc6 0x23 0xa4 0xa0
 
-# CHECK: sb  a0,6(a1)
+# CHECK: sb  $4, 6($5)
 0x06 0x00 0xa4 0xa0
 
-# CHECK: sc  t1,9158(a3)
+# CHECK: sc  $9, 9158($7)
 0xc6 0x23 0xe9 0xe0
 
-# CHECK: sdc1  $f9,9158(a3)
+# CHECK: sdc1  $f9, 9158($7)
 0xc6 0x23 0xe9 0xf4
 
-# CHECK: sh  a0,9158(a1)
+# CHECK: sh  $4, 9158($5)
 0xc6 0x23 0xa4 0xa4
 
-# CHECK: sll a0,v1,0x7
+# CHECK: sll $4, $3, 7
 0xc0 0x21 0x03 0x00
 
-# CHECK: sllv  v0,v1,a1
+# CHECK: sllv  $2, $3, $5
 0x04 0x10 0xa3 0x00
 
-# CHECK: slt v1,v1,a1
+# CHECK: slt $3, $3, $5
 0x2a 0x18 0x65 0x00
 
-# CHECK: slti  v1,v1,103
+# CHECK: slti  $3, $3, 103
 0x67 0x00 0x63 0x28
 
-# CHECK: sltiu v1,v1,103
+# CHECK: sltiu $3, $3, 103
 0x67 0x00 0x63 0x2c
 
-# CHECK: sltu  v1,v1,a1
+# CHECK: sltu  $3, $3, $5
 0x2b 0x18 0x65 0x00
 
-# CHECK: sqrt.d  $f12,$f14
+# CHECK: sqrt.d  $f12, $f14
 0x04 0x73 0x20 0x46
 
-# CHECK: sqrt.s  $f6,$f7
+# CHECK: sqrt.s  $f6, $f7
 0x84 0x39 0x00 0x46
 
-# CHECK: sra a0,v1,0x7
-0xc3 0x21 0x03 0x00
-
-# CHECK: sra a0,v1,0x7
+# CHECK: sra $4, $3, 7
 0xc3 0x21 0x03 0x00
 
-# CHECK: srav  v0,v1,a1
+# CHECK: srav  $2, $3, $5
 0x07 0x10 0xa3 0x00
 
-# CHECK: srl a0,v1,0x7
+# CHECK: srl $4, $3, 7
 0xc2 0x21 0x03 0x00
 
-# CHECK: srlv  v0,v1,a1
+# CHECK: srlv  $2, $3, $5
 0x06 0x10 0xa3 0x00
 
-# CHECK: sub.d $f8,$f12,$f14
+# CHECK: sub.d $f8, $f12, $f14
 0x01 0x62 0x2e 0x46
 
-# CHECK: sub.s $f9,$f6,$f7
+# CHECK: sub.s $f9, $f6, $f7
 0x41 0x32 0x07 0x46
 
-# CHECK: sub t1,a2,a3
+# CHECK: sub $9,  $6, $7
 0x22 0x48 0xc7 0x00
 
-# CHECK: subu  a0,v1,a1
+# CHECK: subu  $4, $3, $5
 0x23 0x20 0x65 0x00
 
-# CHECK: sw  a0,24(a1)
+# CHECK: sw  $4, 24($5)
 0x18 0x00 0xa4 0xac
 
-# CHECK: swc1  $f9,9158(a3)
+# CHECK: swc1  $f9, 9158($7)
 0xc6 0x23 0xe9 0xe4
 
-# CHECK: swl $a0, 16($a1)
+# CHECK: swl $4,  16($5)
 0x10 0x00 0xa4 0xa8
 
-# CHECK: swr $a2, 16($a3)
+# CHECK: swr $6, 16($7)
 0x10 0x00 0xe6 0xb8
 
-# CHECK: sync  0x7
+# CHECK: sync  7
 0xcf 0x01 0x00 0x00
 
-# CHECK: trunc.w.d $f12,$f14
+# CHECK: trunc.w.d $f12, $f14
 0x0d 0x73 0x20 0x46
 
-# CHECK: trunc.w.s $f6,$f7
+# CHECK: trunc.w.s $f6, $f7
 0x8d 0x39 0x00 0x46
 
-# CHECK: xor v1,v1,a1
+# CHECK: xor $3, $3, $5
 0x26 0x18 0x65 0x00
 
-# CHECK: xori  t1,a2,0x4567
+# CHECK: xori  $9,  $6, 17767
 0x67 0x45 0xc9 0x38

Modified: llvm/trunk/test/MC/Disassembler/Mips/mips32r2.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/Mips/mips32r2.txt?rev=160143&r1=160142&r2=160143&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/Mips/mips32r2.txt (original)
+++ llvm/trunk/test/MC/Disassembler/Mips/mips32r2.txt Thu Jul 12 16:19:32 2012
@@ -1,439 +1,430 @@
-# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r2
-
-# CHECK: abs.d $f12,$f14
+# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r2 | FileCheck %s
+# CHECK: .section        __TEXT,__text,regular,pure_instructions
+# CHECK: abs.d $f12, $f14
 0x46 0x20 0x73 0x05
 
-# CHECK: abs.s $f6,$f7
+# CHECK: abs.s $f6, $f7
 0x46 0x00 0x39 0x85
 
-# CHECK: add t1,a2,a3
+# CHECK: add $9, $6, $7
 0x00 0xc7 0x48 0x20
 
-# CHECK: add.d $f8,$f12,$f14
+# CHECK: add.d $f8, $f12, $f14
 0x46 0x2e 0x62 0x00
 
-# CHECK: add.s $f9,$f6,$f7
+# CHECK: add.s $f9, $f6, $f7
 0x46 0x07 0x32 0x40
 
-# CHECK: addi t1,a2,17767
+# CHECK: addi $9, $6, 17767
 0x20 0xc9 0x45 0x67
 
-# CHECK: addiu t1,a2,-15001
+# CHECK: addiu $9, $6, -15001
 0x24 0xc9 0xc5 0x67
 
-# CHECK: addu t1,a2,a3
+# CHECK: addu $9, $6, $7
 0x00 0xc7 0x48 0x21
 
-# CHECK: and t1,a2,a3
+# CHECK: and $9, $6, $7
 0x00 0xc7 0x48 0x24
 
-# CHECK: andi t1,a2,0x4567
+# CHECK: andi $9, $6, 17767
 0x30 0xc9 0x45 0x67
 
-# CHECK: b 00000534
+# CHECK: b 1332
 0x10 0x00 0x01 0x4c
 
-# CHECK: bal 00000534
-0x04 0x11 0x01 0x4c
-
-# CHECK: bc1f 00000534
+# CHECK: bc1f 1332
 0x45 0x00 0x01 0x4c
 
-# CHECK: bc1t 00000534
+# CHECK: bc1t 1332
 0x45 0x01 0x01 0x4c
 
-# CHECK: beq t1,a2,00000534
+# CHECK: beq $9, $6, 1332
 0x11 0x26 0x01 0x4c
 
-# CHECK: bgez a2,00000534
+# CHECK: bgez  $6, 1332
 0x04 0xc1 0x01 0x4c
 
-# CHECK: bgezal a2,00000534
+# CHECK: bgezal  $6, 1332
 0x04 0xd1 0x01 0x4c
 
-# CHECK: bgtz a2,00000534
+# CHECK: bgtz  $6, 1332
 0x1c 0xc0 0x01 0x4c
 
-# CHECK: blez a2,00000534
+# CHECK: blez  $6, 1332
 0x18 0xc0 0x01 0x4c
 
-# CHECK: bne t1,a2,00000534
+# CHECK: bne $9, $6, 1332
 0x15 0x26 0x01 0x4c
 
-# CHECK: c.eq.d $f12,$f14
+# CHECK: c.eq.d $f12, $f14
 0x46 0x2e 0x60 0x32
 
-# CHECK: c.eq.s $f6,$f7
+# CHECK: c.eq.s $f6, $f7
 0x46 0x07 0x30 0x32
 
-# CHECK: c.f.d $f12,$f14
+# CHECK: c.f.d $f12, $f14
 0x46 0x2e 0x60 0x30
 
-# CHECK: c.f.s $f6,$f7
+# CHECK: c.f.s $f6, $f7
 0x46 0x07 0x30 0x30
 
-# CHECK: c.le.d $f12,$f14
+# CHECK: c.le.d $f12, $f14
 0x46 0x2e 0x60 0x3e
 
-# CHECK: c.le.s $f6,$f7
+# CHECK: c.le.s $f6, $f7
 0x46 0x07 0x30 0x3e
 
-# CHECK: c.lt.d $f12,$f14
+# CHECK: c.lt.d $f12, $f14
 0x46 0x2e 0x60 0x3c
 
-# CHECK: c.lt.s $f6,$f7
+# CHECK: c.lt.s $f6, $f7
 0x46 0x07 0x30 0x3c
 
-# CHECK: c.nge.d $f12,$f14
+# CHECK: c.nge.d $f12, $f14
 0x46 0x2e 0x60 0x3d
 
-# CHECK: c.nge.s $f6,$f7
+# CHECK: c.nge.s $f6, $f7
 0x46 0x07 0x30 0x3d
 
-# CHECK: c.ngl.d $f12,$f14
+# CHECK: c.ngl.d $f12, $f14
 0x46 0x2e 0x60 0x3b
 
-# CHECK: c.ngl.s $f6,$f7
+# CHECK: c.ngl.s $f6, $f7
 0x46 0x07 0x30 0x3b
 
-# CHECK: c.ngle.d $f12,$f14
+# CHECK: c.ngle.d $f12, $f14
 0x46 0x2e 0x60 0x39
 
-# CHECK: c.ngle.s $f6,$f7
+# CHECK: c.ngle.s $f6, $f7
 0x46 0x07 0x30 0x39
 
-# CHECK: c.ngt.d $f12,$f14
+# CHECK: c.ngt.d $f12, $f14
 0x46 0x2e 0x60 0x3f
 
-# CHECK: c.ngt.s $f6,$f7
+# CHECK: c.ngt.s $f6, $f7
 0x46 0x07 0x30 0x3f
 
-# CHECK: c.ole.d $f12,$f14
+# CHECK: c.ole.d $f12, $f14
 0x46 0x2e 0x60 0x36
 
-# CHECK: c.ole.s $f6,$f7
+# CHECK: c.ole.s $f6, $f7
 0x46 0x07 0x30 0x36
 
-# CHECK: c.olt.d $f12,$f14
+# CHECK: c.olt.d $f12, $f14
 0x46 0x2e 0x60 0x34
 
-# CHECK: c.olt.s $f6,$f7
+# CHECK: c.olt.s $f6, $f7
 0x46 0x07 0x30 0x34
 
-# CHECK: c.seq.d $f12,$f14
+# CHECK: c.seq.d $f12, $f14
 0x46 0x2e 0x60 0x3a
 
-# CHECK: c.seq.s $f6,$f7
+# CHECK: c.seq.s $f6, $f7
 0x46 0x07 0x30 0x3a
 
-# CHECK: c.sf.d $f12,$f14
+# CHECK: c.sf.d $f12, $f14
 0x46 0x2e 0x60 0x38
 
-# CHECK: c.sf.s $f6,$f7
+# CHECK: c.sf.s $f6, $f7
 0x46 0x07 0x30 0x38
 
-# CHECK: c.ueq.d $f12,$f14
+# CHECK: c.ueq.d $f12, $f14
 0x46 0x2e 0x60 0x33
 
-# CHECK: c.ueq.s $f28,$f18
+# CHECK: c.ueq.s $f28, $f18
 0x46 0x12 0xe0 0x33
 
-# CHECK: c.ule.d $f12,$f14
+# CHECK: c.ule.d $f12, $f14
 0x46 0x2e 0x60 0x37
 
-# CHECK: c.ule.s $f6,$f7
+# CHECK: c.ule.s $f6, $f7
 0x46 0x07 0x30 0x37
 
-# CHECK: c.ult.d $f12,$f14
+# CHECK: c.ult.d $f12, $f14
 0x46 0x2e 0x60 0x35
 
-# CHECK: c.ult.s $f6,$f7
+# CHECK: c.ult.s $f6, $f7
 0x46 0x07 0x30 0x35
 
-# CHECK: c.un.d $f12,$f14
+# CHECK: c.un.d $f12, $f14
 0x46 0x2e 0x60 0x31
 
-# CHECK: c.un.s $f6,$f7
+# CHECK: c.un.s $f6, $f7
 0x46 0x07 0x30 0x31
 
-# CHECK: ceil.w.d $f12,$f14
+# CHECK: ceil.w.d $f12, $f14
 0x46 0x20 0x73 0x0e
 
-# CHECK: ceil.w.s $f6,$f7
+# CHECK: ceil.w.s $f6, $f7
 0x46 0x00 0x39 0x8e
 
-# CHECK: cfc1 a2,$7
+# CHECK: cfc1  $6, $7
 0x44 0x46 0x38 0x00
 
-# CHECK: clo a2,a3
+# CHECK: clo  $6, $7
 0x70 0xe6 0x30 0x21
 
-# CHECK: clz a2,a3
+# CHECK: clz  $6, $7
 0x70 0xe6 0x30 0x20
 
-# CHECK: ctc1 a2,$7
+# CHECK: ctc1  $6, $7
 0x44 0xc6 0x38 0x00
 
-# CHECK: cvt.d.s $f6,$f7
+# CHECK: cvt.d.s $f6, $f7
 0x46 0x00 0x39 0xa1
 
-# CHECK: cvt.d.w $f12,$f14
+# CHECK: cvt.d.w $f12, $f14
 0x46 0x80 0x73 0x21
 
-# CHECK: cvt.l.d $f12,$f14
-0x46 0x20 0x73 0x05
+# CHECK: cvt.l.d $f12, $f14
+0x46 0x20 0x73 0x25
 
-# CHECK: cvt.l.s $f6,$f7
+# CHECK: cvt.l.s $f6, $f7
 0x46 0x00 0x39 0xa5
 
-# CHECK: cvt.s.d $f12,$f14
+# CHECK: cvt.s.d $f12, $f14
 0x46 0x20 0x73 0x20
 
-# CHECK: cvt.s.w $f6,$f7
+# CHECK: cvt.s.w $f6, $f7
 0x46 0x80 0x39 0xa0
 
-# CHECK: cvt.w.d $f12,$f14
+# CHECK: cvt.w.d $f12, $f14
 0x46 0x20 0x73 0x24
 
-# CHECK: cvt.w.s $f6,$f7
+# CHECK: cvt.w.s $f6, $f7
 0x46 0x00 0x39 0xa4
 
-# CHECK: floor.w.d $f12,$f14
+# CHECK: floor.w.d $f12, $f14
 0x46 0x20 0x73 0x0f
 
-# CHECK: floor.w.s $f6,$f7
+# CHECK: floor.w.s $f6, $f7
 0x46 0x00 0x39 0x8f
 
-# CHECK: ins s3,t1,0x6,0x7
+# CHECK: ins $19, $9, 6, 7
 0x7d 0x33 0x61 0x84
 
-# CHECK: j 00000530
+# CHECK: j 1328
 0x08 0x00 0x01 0x4c
 
-# CHECK: jal 00000530
+# CHECK: jal 1328
 0x0c 0x00 0x01 0x4c
 
-# CHECK: jalr a2,a3
+# CHECK: jalr  $7
 0x00 0xe0 0xf8 0x09
 
-# CHECK: jr a3
+# CHECK: jr  $7
 0x00 0xe0 0x00 0x08
 
-# CHECK: lb  a0,9158(a1)
+# CHECK: lb  $4, 9158($5)
 0x80 0xa4 0x23 0xc6
 
-# CHECK: lbu a0,6(a1)
+# CHECK: lbu $4, 6($5)
 0x90 0xa4 0x00 0x06
 
-# CHECK: ldc1  $f9,9158(a3)
+# CHECK: ldc1  $f9, 9158($7)
 0xd4 0xe9 0x23 0xc6
 
-# CHECK: lh  a0,12(a1)
+# CHECK: lh  $4, 12($5)
 0x84 0xa4 0x00 0x0c
 
-# CHECK: lh  a0,12(a1)
+# CHECK: lh  $4, 12($5)
 0x84 0xa4 0x00 0x0c
 
-# CHECK: li  v1,17767
-0x24 0x03 0x45 0x67
-
-# CHECK: ll  t1,9158(a3)
+# CHECK: ll  $9, 9158($7)
 0xc0 0xe9 0x23 0xc6
 
-# CHECK: lui a2,0x4567
+# CHECK: lui  $6, 17767
 0x3c 0x06 0x45 0x67
 
-# CHECK: lw  a0,24(a1)
+# CHECK: lw  $4, 24($5)
 0x8c 0xa4 0x00 0x18
 
-# CHECK: lwc1  $f9,9158(a3)
+# CHECK: lwc1  $f9, 9158($7)
 0xc4 0xe9 0x23 0xc6
 
-# CHECK: madd  a2,a3
+# CHECK: lwl   $2,  3($4)
+0x88 0x82 0x00 0x03
+
+# CHECK: lwr   $3, 16($5)
+0x98 0xa3 0x00 0x10
+
+# CHECK: madd   $6,  $7
 0x70 0xc7 0x00 0x00
 
-# CHECK: maddu a2,a3
+# CHECK: maddu  $6,  $7
 0x70 0xc7 0x00 0x01
 
-# CHECK: mfc1  a2,$f7
+# CHECK: mfc1   $6, $f7
 0x44 0x06 0x38 0x00
 
-# CHECK: mfhi  a1
+# CHECK: mfhi  $5
 0x00 0x00 0x28 0x10
 
-# CHECK: mflo  a1
+# CHECK: mflo  $5
 0x00 0x00 0x28 0x12
 
-# CHECK: mov.d $f6,$f8
+# CHECK: mov.d $f6, $f8
 0x46 0x20 0x41 0x86
 
-# CHECK: mov.s $f6,$f7
+# CHECK: mov.s $f6, $f7
 0x46 0x00 0x39 0x86
 
-# CHECK: move  a2,a1
-0x00 0xa0 0x30 0x21
-
-# CHECK: msub  a2,a3
+# CHECK: msub   $6,  $7
 0x70 0xc7 0x00 0x04
 
-# CHECK: msubu a2,a3
+# CHECK: msubu  $6,  $7
 0x70 0xc7 0x00 0x05
 
-# CHECK: mtc1  a2,$f7
+# CHECK: mtc1   $6, $f7
 0x44 0x86 0x38 0x00
 
-# CHECK: mthi  a3
+# CHECK: mthi   $7
 0x00 0xe0 0x00 0x11
 
-# CHECK: mtlo  a3
+# CHECK: mtlo   $7
 0x00 0xe0 0x00 0x13
 
-# CHECK: mul.d $f8,$f12,$f14
+# CHECK: mul.d $f8, $f12, $f14
 0x46 0x2e 0x62 0x02
 
-# CHECK: mul.s $f9,$f6,$f7
+# CHECK: mul.s $f9, $f6, $f7
 0x46 0x07 0x32 0x42
 
-# CHECK: mul t1,a2,a3
+# CHECK: mul $9,  $6,  $7
 0x70 0xc7 0x48 0x02
 
-# CHECK: mult  v1,a1
+# CHECK: mult  $3, $5
 0x00 0x65 0x00 0x18
 
-# CHECK: multu v1,a1
+# CHECK: multu $3, $5
 0x00 0x65 0x00 0x19
 
-# CHECK: neg.d $f12,$f14
+# CHECK: neg.d $f12, $f14
 0x46 0x20 0x73 0x07
 
-# CHECK: neg.s $f6,$f7
+# CHECK: neg.s $f6, $f7
 0x46 0x00 0x39 0x87
 
-# CHECK: neg v1,a1
-0x00 0x05 0x18 0x22
-
 # CHECK: nop
 0x00 0x00 0x00 0x00
 
-# CHECK: nor t1,a2,a3
+# CHECK: nor $9,  $6, $7
 0x00 0xc7 0x48 0x27
 
-# CHECK: not v1,a1
-0x00 0xa0 0x18 0x27
-
-# CHECK: or  v1,v1,a1
+# CHECK: or  $3, $3, $5
 0x00 0x65 0x18 0x25
 
-# CHECK: ori t1,a2,0x4567
+# CHECK: ori $9,  $6, 17767
 0x34 0xc9 0x45 0x67
 
-# CHECK: rdhwr a2,$29
-0x7c 0x06 0xe8 0x3b
-
-# CHECK: ror t1,a2,0x7
+# CHECK: rotr $9, $6, 7
 0x00 0x26 0x49 0xc2
 
-# CHECK: rorv  t1,a2,a3
+# CHECK:  rotrv $9, $6, $7
 0x00 0xe6 0x48 0x46
 
-# CHECK: round.w.d $f6,$f14
+# CHECK: round.w.d $f12, $f14
 0x46 0x20 0x73 0x0c
 
-# CHECK: round.w.s $f6,$f7
+# CHECK: round.w.s $f6, $f7
 0x46 0x00 0x39 0x8c
 
-# CHECK: sb  a0,9158(a1)
+# CHECK: sb  $4, 9158($5)
 0xa0 0xa4 0x23 0xc6
 
-# CHECK: sb  a0,6(a1)
+# CHECK: sb  $4, 6($5)
 0xa0 0xa4 0x00 0x06
 
-# CHECK: sc  t1,9158(a3)
+# CHECK: sc  $9, 9158($7)
 0xe0 0xe9 0x23 0xc6
 
-# CHECK: sdc1  $f9,9158(a3)
+# CHECK: sdc1  $f9, 9158($7)
 0xf4 0xe9 0x23 0xc6
 
-# CHECK: seb a2,a3
+# CHECK: seb $6, $7
 0x7c 0x07 0x34 0x20
 
-# CHECK: seh a2,a3
+# CHECK: seh $6, $7
 0x7c 0x07 0x36 0x20
 
-# CHECK: sh  a0,9158(a1)
+# CHECK: sh  $4, 9158($5)
 0xa4 0xa4 0x23 0xc6
 
-# CHECK: sll a0,v1,0x7
+# CHECK: sll $4, $3, 7
 0x00 0x03 0x21 0xc0
 
-# CHECK: sllv  v0,v1,a1
+# CHECK: sllv  $2, $3, $5
 0x00 0xa3 0x10 0x04
 
-# CHECK: slt v1,v1,a1
+# CHECK: slt $3, $3, $5
 0x00 0x65 0x18 0x2a
 
-# CHECK: slti  v1,v1,103
+# CHECK: slti  $3, $3, 103
 0x28 0x63 0x00 0x67
 
-# CHECK: sltiu v1,v1,103
+# CHECK: sltiu $3, $3, 103
 0x2c 0x63 0x00 0x67
 
-# CHECK: sltu  v1,v1,a1
+# CHECK: sltu  $3, $3, $5
 0x00 0x65 0x18 0x2b
 
-# CHECK: sqrt.d  $f12,$f14
+# CHECK: sqrt.d  $f12, $f14
 0x46 0x20 0x73 0x04
 
-# CHECK: sqrt.s  $f6,$f7
+# CHECK: sqrt.s  $f6, $f7
 0x46 0x00 0x39 0x84
 
-# CHECK: sra a0,v1,0x7
+# CHECK: sra $4, $3, 7
 0x00 0x03 0x21 0xc3
 
-# CHECK: sra a0,v1,0x7
-0x00 0x03 0x21 0xc3
-
-# CHECK: srav  v0,v1,a1
+# CHECK: srav  $2, $3, $5
 0x00 0xa3 0x10 0x07
 
-# CHECK: srl a0,v1,0x7
+# CHECK: srl $4, $3, 7
 0x00 0x03 0x21 0xc2
 
-# CHECK: srlv  v0,v1,a1
+# CHECK: srlv  $2, $3, $5
 0x00 0xa3 0x10 0x06
 
-# CHECK: sub.d $f8,$f12,$f14
+# CHECK: sub.d $f8, $f12, $f14
 0x46 0x2e 0x62 0x01
 
-# CHECK: sub.s $f9,$f6,$f7
+# CHECK: sub.s $f9, $f6, $f7
 0x46 0x07 0x32 0x41
 
-# CHECK: sub t1,a2,a3
+# CHECK: sub $9,  $6, $7
 0x00 0xc7 0x48 0x22
 
-# CHECK: subu  a0,v1,a1
+# CHECK: subu  $4, $3, $5
 0x00 0x65 0x20 0x23
 
-# CHECK: sw  a0,24(a1)
+# CHECK: sw  $4, 24($5)
 0xac 0xa4 0x00 0x18
 
-# CHECK: swc1  $f9,9158(a3)
+# CHECK: swc1  $f9, 9158($7)
 0xe4 0xe9 0x23 0xc6
 
-# CHECK: sync  0x7
+# CHECK: swl $4,  16($5)
+0xa8 0xa4 0x00 0x10
+
+# CHECK: swr $6, 16($7)
+0xb8 0xe6 0x00 0x10
+
+# CHECK: sync  7
 0x00 0x00 0x01 0xcf
 
-# CHECK: trunc.w.d $f12,$f14
+# CHECK: trunc.w.d $f12, $f14
 0x46 0x20 0x73 0x0d
 
-# CHECK: trunc.w.s $f6,$f7
+# CHECK: trunc.w.s $f6, $f7
 0x46 0x00 0x39 0x8d
 
-# CHECK: wsbh  a2,a3
+# CHECK: wsbh  $6, $7
 0x7c 0x07 0x30 0xa0
 
-# CHECK: xor v1,v1,a1
+# CHECK: xor $3, $3, $5
 0x00 0x65 0x18 0x26
 
-# CHECK: xori  t1,a2,0x4567
+# CHECK: xori  $9,  $6, 17767
 0x38 0xc9 0x45 0x67

Modified: llvm/trunk/test/MC/Disassembler/Mips/mips32r2_le.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/Mips/mips32r2_le.txt?rev=160143&r1=160142&r2=160143&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/Mips/mips32r2_le.txt (original)
+++ llvm/trunk/test/MC/Disassembler/Mips/mips32r2_le.txt Thu Jul 12 16:19:32 2012
@@ -1,442 +1,430 @@
-# RUN: llvm-mc --disassemble %s -triple=mipsel-unknown-linux -mcpu=mips32r2
-
-# CHECK: abs.d $f12,$f14
+# RUN: llvm-mc --disassemble %s -triple=mipsel-unknown-linux -mcpu=mips32r2 | FileCheck %s
+# CHECK: .section        __TEXT,__text,regular,pure_instructions
+# CHECK: abs.d $f12, $f14
 0x05 0x73 0x20 0x46
 
-# CHECK: abs.s $f6,$f7
+# CHECK: abs.s $f6, $f7
 0x85 0x39 0x00 0x46
 
-# CHECK: add t1,a2,a3
+# CHECK: add $9, $6, $7
 0x20 0x48 0xc7 0x00
 
-# CHECK: add.d $8,$f12,$f14
+# CHECK: add.d $f8, $f12, $f14
 0x00 0x62 0x2e 0x46
 
-# CHECK: add.s $f9,$f6,$f7
+# CHECK: add.s $f9, $f6, $f7
 0x40 0x32 0x07 0x46
 
-# CHECK: addi t1,a2,17767
+# CHECK: addi $9, $6, 17767
 0x67 0x45 0xc9 0x20
 
-# CHECK: addiu t1,a2,-15001
+# CHECK: addiu $9, $6, -15001
 0x67 0xc5 0xc9 0x24
 
-# CHECK: addu t1,a2,a3
+# CHECK: addu $9, $6, $7
 0x21 0x48 0xc7 0x00
 
-# CHECK: and t1,a2,a3
+# CHECK: and $9, $6, $7
 0x24 0x48 0xc7 0x00
 
-# CHECK: andi t1,a2,0x4567
+# CHECK: andi $9, $6, 17767
 0x67 0x45 0xc9 0x30
 
-# CHECK: b 00000534
+# CHECK: b 1332
 0x4c 0x01 0x00 0x10
 
-# CHECK: bal 00000534
-0x4c 0x01 0x11 0x04
-
-# CHECK: bc1f 00000534
+# CHECK: bc1f 1332
 0x4c 0x01 0x00 0x45
 
-# CHECK: bc1t 00000534
+# CHECK: bc1t 1332
 0x4c 0x01 0x01 0x45
 
-# CHECK: beq t1,a2,00000534
+# CHECK: beq $9, $6, 1332
 0x4c 0x01 0x26 0x11
 
-# CHECK: bgez a2,00000534
+# CHECK: bgez  $6, 1332
 0x4c 0x01 0xc1 0x04
 
-# CHECK: bgezal a2,00000534
+# CHECK: bgezal  $6, 1332
 0x4c 0x01 0xd1 0x04
 
-# CHECK: bgtz a2,00000534
+# CHECK: bgtz  $6, 1332
 0x4c 0x01 0xc0 0x1c
 
-# CHECK: blez a2,00000534
+# CHECK: blez  $6, 1332
 0x4c 0x01 0xc0 0x18
 
-# CHECK: bne t1,a2,00000534
+# CHECK: bne $9, $6, 1332
 0x4c 0x01 0x26 0x15
 
-# CHECK: c.eq.d $f12,$f14
+# CHECK: c.eq.d $f12, $f14
 0x32 0x60 0x2e 0x46
 
-# CHECK: c.eq.s $f6,$f7
+# CHECK: c.eq.s $f6, $f7
 0x32 0x30 0x07 0x46
 
-# CHECK: c.f.d $f12,$f14
+# CHECK: c.f.d $f12, $f14
 0x30 0x60 0x2e 0x46
 
-# CHECK: c.f.s $f6,$f7
+# CHECK: c.f.s $f6, $f7
 0x30 0x30 0x07 0x46
 
-# CHECK: c.le.d $f12,$f14
+# CHECK: c.le.d $f12, $f14
 0x3e 0x60 0x2e 0x46
 
-# CHECK: c.le.s $f6,$f7
+# CHECK: c.le.s $f6, $f7
 0x3e 0x30 0x07 0x46
 
-# CHECK: c.lt.d $f12,$f14
+# CHECK: c.lt.d $f12, $f14
 0x3c 0x60 0x2e 0x46
 
-# CHECK: c.lt.s $f6,$f7
+# CHECK: c.lt.s $f6, $f7
 0x3c 0x30 0x07 0x46
 
-# CHECK: c.nge.d $f12,$f14
+# CHECK: c.nge.d $f12, $f14
 0x3d 0x60 0x2e 0x46
 
-# CHECK: c.nge.s $f6,$f7
+# CHECK: c.nge.s $f6, $f7
 0x3d 0x30 0x07 0x46
 
-# CHECK: c.ngl.d $f12,$f14
+# CHECK: c.ngl.d $f12, $f14
 0x3b 0x60 0x2e 0x46
 
-# CHECK: c.ngl.s $f6,$f7
+# CHECK: c.ngl.s $f6, $f7
 0x3b 0x30 0x07 0x46
 
-# CHECK: c.ngle.d $f12,$f14
+# CHECK: c.ngle.d $f12, $f14
 0x39 0x60 0x2e 0x46
 
-# CHECK: c.ngle.s $f6,$f7
+# CHECK: c.ngle.s $f6, $f7
 0x39 0x30 0x07 0x46
 
-# CHECK: c.ngt.d $f12,$f14
+# CHECK: c.ngt.d $f12, $f14
 0x3f 0x60 0x2e 0x46
 
-# CHECK: c.ngt.s $f6,$f7
+# CHECK: c.ngt.s $f6, $f7
 0x3f 0x30 0x07 0x46
 
-# CHECK: c.ole.d $f12,$f14
+# CHECK: c.ole.d $f12, $f14
 0x36 0x60 0x2e 0x46
 
-# CHECK: c.ole.s $f6,$f7
+# CHECK: c.ole.s $f6, $f7
 0x36 0x30 0x07 0x46
 
-# CHECK: c.olt.d $f12,$f14
+# CHECK: c.olt.d $f12, $f14
 0x34 0x60 0x2e 0x46
 
-# CHECK: c.olt.s $f6,$f7
+# CHECK: c.olt.s $f6, $f7
 0x34 0x30 0x07 0x46
 
-# CHECK: c.seq.d $f12,$f14
+# CHECK: c.seq.d $f12, $f14
 0x3a 0x60 0x2e 0x46
 
-# CHECK: c.seq.s $f6,$f7
+# CHECK: c.seq.s $f6, $f7
 0x3a 0x30 0x07 0x46
 
-# CHECK: c.sf.d $f12,$f14
+# CHECK: c.sf.d $f12, $f14
 0x38 0x60 0x2e 0x46
 
-# CHECK: c.sf.s $f6,$f7
+# CHECK: c.sf.s $f6, $f7
 0x38 0x30 0x07 0x46
 
-# CHECK: c.ueq.d $f12,$f14
+# CHECK: c.ueq.d $f12, $f14
 0x33 0x60 0x2e 0x46
 
-# CHECK: c.ueq.s $f28,$f18
+# CHECK: c.ueq.s $f28, $f18
 0x33 0xe0 0x12 0x46
 
-# CHECK: c.ule.d $f12,$f14
+# CHECK: c.ule.d $f12, $f14
 0x37 0x60 0x2e 0x46
 
-# CHECK: c.ule.s $f6,$f7
+# CHECK: c.ule.s $f6, $f7
 0x37 0x30 0x07 0x46
 
-# CHECK: c.ult.d $f12,$f14
+# CHECK: c.ult.d $f12, $f14
 0x35 0x60 0x2e 0x46
 
-# CHECK: c.ult.s $f6,$f7
+# CHECK: c.ult.s $f6, $f7
 0x35 0x30 0x07 0x46
 
-# CHECK: c.un.d $f12,$f14
+# CHECK: c.un.d $f12, $f14
 0x31 0x60 0x2e 0x46
 
-# CHECK: c.un.s $f6,$f7
+# CHECK: c.un.s $f6, $f7
 0x31 0x30 0x07 0x46
 
-# CHECK: ceil.w.d $f12,$f14
+# CHECK: ceil.w.d $f12, $f14
 0x0e 0x73 0x20 0x46
 
-# CHECK: ceil.w.s $f6,$f7
-0x0e 0x73 0x20 0x46
+# CHECK: ceil.w.s $f6, $f7
+0x8e 0x39 0x00 0x46
 
-# CHECK: cfc1 a2,$7
+# CHECK: cfc1  $6, $7
 0x00 0x38 0x46 0x44
 
-# CHECK: clo a2,a3
+# CHECK: clo  $6, $7
 0x21 0x30 0xe6 0x70
 
-# CHECK: clz a2,a3
+# CHECK: clz  $6, $7
 0x20 0x30 0xe6 0x70
 
-# CHECK: ctc1 a2,$7
+# CHECK: ctc1  $6, $7
 0x00 0x38 0xc6 0x44
 
-# CHECK: cvt.d.s $f6,$f7
+# CHECK: cvt.d.s $f6, $f7
 0xa1 0x39 0x00 0x46
 
-# CHECK: cvt.d.w $f12,$f14
+# CHECK: cvt.d.w $f12, $f14
 0x21 0x73 0x80 0x46
 
-# CHECK: cvt.l.d $f12,$f14
-0x05 0x73 0x20 0x46
+# CHECK: cvt.l.d $f12, $f14
+0x25 0x73 0x20 0x46
 
-# CHECK: cvt.l.s $f6,$f7
+# CHECK: cvt.l.s $f6, $f7
 0xa5 0x39 0x00 0x46
 
-# CHECK: cvt.s.d $f12,$f14
+# CHECK: cvt.s.d $f12, $f14
 0x20 0x73 0x20 0x46
 
-# CHECK: cvt.s.w $f6,$f7
+# CHECK: cvt.s.w $f6, $f7
 0xa0 0x39 0x80 0x46
 
-# CHECK: cvt.w.d $f12,$f14
+# CHECK: cvt.w.d $f12, $f14
 0x24 0x73 0x20 0x46
 
-# CHECK: cvt.w.s $f6,$f7
+# CHECK: cvt.w.s $f6, $f7
 0xa4 0x39 0x00 0x46
 
-# CHECK: floor.w.d $f12,$f14
+# CHECK: floor.w.d $f12, $f14
 0x0f 0x73 0x20 0x46
 
-# CHECK: floor.w.s $f6,$f7
+# CHECK: floor.w.s $f6, $f7
 0x8f 0x39 0x00 0x46
 
-# CHECK: ins s3,t1,0x6,0x7
+# CHECK: ins $19, $9, 6, 7
 0x84 0x61 0x33 0x7d
 
-# CHECK: j 00000530
+# CHECK: j 1328
 0x4c 0x01 0x00 0x08
 
-# CHECK: jal 00000530
+# CHECK: jal 1328
 0x4c 0x01 0x00 0x0c
 
-# CHECK: jalr a3
+# CHECK: jalr  $7
 0x09 0xf8 0xe0 0x00
 
-# CHECK: jr a3
+# CHECK: jr  $7
 0x08 0x00 0xe0 0x00
 
-# CHECK: lb  a0,9158(a1)
+# CHECK: lb  $4, 9158($5)
 0xc6 0x23 0xa4 0x80
 
-# CHECK: lbu a0,6(a1)
+# CHECK: lbu $4, 6($5)
 0x06 0x00 0xa4 0x90
 
-# CHECK: ldc1  $f9,9158(a3)
+# CHECK: ldc1  $f9, 9158($7)
 0xc6 0x23 0xe9 0xd4
 
-# CHECK: lh  a0,12(a1)
+# CHECK: lh  $4, 12($5)
 0x0c 0x00 0xa4 0x84
 
-# CHECK: lh  a0,12(a1)
+# CHECK: lh  $4, 12($5)
 0x0c 0x00 0xa4 0x84
 
-# CHECK: li  v1,17767
-0x67 0x45 0x03 0x24
-
-# CHECK: ll  t1,9158(a3)
+# CHECK: ll  $9, 9158($7)
 0xc6 0x23 0xe9 0xc0
 
-# CHECK: lui a2,0x4567
+# CHECK: lui  $6, 17767
 0x67 0x45 0x06 0x3c
 
-# CHECK: lw  a0,24(a1)
+# CHECK: lw  $4, 24($5)
 0x18 0x00 0xa4 0x8c
 
-# CHECK lw at,-18316(v0)
-0x74 0xb8 0x41 0x8c
-
-# CHECK: lwc1  $f9,9158(a3)
+# CHECK: lwc1  $f9, 9158($7)
 0xc6 0x23 0xe9 0xc4
 
-# CHECK: madd  a2,a3
+# CHECK: lwl   $2,  3($4)
+0x03 0x00 0x82 0x88
+
+# CHECK: lwr   $3, 16($5)
+0x10 0x00 0xa3 0x98
+
+# CHECK: madd   $6,  $7
 0x00 0x00 0xc7 0x70
 
-# CHECK: maddu a2,a3
+# CHECK: maddu  $6,  $7
 0x01 0x00 0xc7 0x70
 
-# CHECK: mfc1  a2,$f7
+# CHECK: mfc1   $6, $f7
 0x00 0x38 0x06 0x44
 
-# CHECK: mfhi  a1
+# CHECK: mfhi  $5
 0x10 0x28 0x00 0x00
 
-# CHECK: mflo  a1
+# CHECK: mflo  $5
 0x12 0x28 0x00 0x00
 
-# CHECK: mov.d $f6,$f8
+# CHECK: mov.d $f6, $f8
 0x86 0x41 0x20 0x46
 
-# CHECK: mov.s $f6,$f7
+# CHECK: mov.s $f6, $f7
 0x86 0x39 0x00 0x46
 
-# CHECK: move  a2,a1
-0x21 0x30 0xa0 0x00
-
-# CHECK: msub  a2,a3
+# CHECK: msub   $6,  $7
 0x04 0x00 0xc7 0x70
 
-# CHECK: msubu a2,a3
+# CHECK: msubu  $6,  $7
 0x05 0x00 0xc7 0x70
 
-# CHECK: mtc1  a2,$f7
+# CHECK: mtc1   $6, $f7
 0x00 0x38 0x86 0x44
 
-# CHECK: mthi  a3
+# CHECK: mthi   $7
 0x11 0x00 0xe0 0x00
 
-# CHECK: mtlo  a3
+# CHECK: mtlo   $7
 0x13 0x00 0xe0 0x00
 
-# CHECK: mul.d $f8,$f12,$f14
+# CHECK: mul.d $f8, $f12, $f14
 0x02 0x62 0x2e 0x46
 
-# CHECK: mul.s $f9,$f6,$f7
-0x02 0x62 0x07 0x46
+# CHECK: mul.s $f9, $f6, $f7
+0x42 0x32 0x07 0x46
 
-# CHECK: mul t1,a2,a3
+# CHECK: mul $9,  $6,  $7
 0x02 0x48 0xc7 0x70
 
-# CHECK: mult  v1,a1
+# CHECK: mult  $3, $5
 0x18 0x00 0x65 0x00
 
-# CHECK: multu v1,a1
+# CHECK: multu $3, $5
 0x19 0x00 0x65 0x00
 
-# CHECK: neg.d $f12,$f14
+# CHECK: neg.d $f12, $f14
 0x07 0x73 0x20 0x46
 
-# CHECK: neg.s $f6,$f7
+# CHECK: neg.s $f6, $f7
 0x87 0x39 0x00 0x46
 
-# CHECK: neg v1,a1
-0x22 0x18 0x05 0x00
-
 # CHECK: nop
 0x00 0x00 0x00 0x00
 
-# CHECK: nor t1,a2,a3
+# CHECK: nor $9,  $6, $7
 0x27 0x48 0xc7 0x00
 
-# CHECK: not v1,a1
-0x27 0x18 0xa0 0x00
-
-# CHECK: or  v1,v1,a1
+# CHECK: or  $3, $3, $5
 0x25 0x18 0x65 0x00
 
-# CHECK: ori t1,a2,0x4567
+# CHECK: ori $9,  $6, 17767
 0x67 0x45 0xc9 0x34
 
-# CHECK: rdhwr a2,$29
-0x3b 0xe8 0x06 0x7c
-
-# CHECK: ror t1,a2,0x7
+# CHECK: rotr $9, $6, 7
 0xc2 0x49 0x26 0x00
 
-# CHECK: rorv  t1,a2,a3
+# CHECK:  rotrv $9, $6, $7
 0x46 0x48 0xe6 0x00
 
-# CHECK: round.w.d $f12,$f14
+# CHECK: round.w.d $f12, $f14
 0x0c 0x73 0x20 0x46
 
-# CHECK: round.w.s $f6,$f7
+# CHECK: round.w.s $f6, $f7
 0x8c 0x39 0x00 0x46
 
-# CHECK: sb  a0,9158(a1)
+# CHECK: sb  $4, 9158($5)
 0xc6 0x23 0xa4 0xa0
 
-# CHECK: sb  a0,6(a1)
+# CHECK: sb  $4, 6($5)
 0x06 0x00 0xa4 0xa0
 
-# CHECK: sc  t1,9158(a3)
+# CHECK: sc  $9, 9158($7)
 0xc6 0x23 0xe9 0xe0
 
-# CHECK: sdc1  $f9,9158(a3)
+# CHECK: sdc1  $f9, 9158($7)
 0xc6 0x23 0xe9 0xf4
 
-# CHECK: seb a2,a3
+# CHECK: seb $6, $7
 0x20 0x34 0x07 0x7c
 
-# CHECK: seh a2,a3
+# CHECK: seh $6, $7
 0x20 0x36 0x07 0x7c
 
-# CHECK: sh  a0,9158(a1)
+# CHECK: sh  $4, 9158($5)
 0xc6 0x23 0xa4 0xa4
 
-# CHECK: sll a0,v1,0x7
+# CHECK: sll $4, $3, 7
 0xc0 0x21 0x03 0x00
 
-# CHECK: sllv  v0,v1,a1
+# CHECK: sllv  $2, $3, $5
 0x04 0x10 0xa3 0x00
 
-# CHECK: slt v1,v1,a1
+# CHECK: slt $3, $3, $5
 0x2a 0x18 0x65 0x00
 
-# CHECK: slti  v1,v1,103
+# CHECK: slti  $3, $3, 103
 0x67 0x00 0x63 0x28
 
-# CHECK: sltiu v1,v1,103
+# CHECK: sltiu $3, $3, 103
 0x67 0x00 0x63 0x2c
 
-# CHECK: sltu  v1,v1,a1
+# CHECK: sltu  $3, $3, $5
 0x2b 0x18 0x65 0x00
 
-# CHECK: sqrt.d  $f12,$f14
+# CHECK: sqrt.d  $f12, $f14
 0x04 0x73 0x20 0x46
 
-# CHECK: sqrt.s  $f6,$f7
+# CHECK: sqrt.s  $f6, $f7
 0x84 0x39 0x00 0x46
 
-# CHECK: sra a0,v1,0x7
+# CHECK: sra $4, $3, 7
 0xc3 0x21 0x03 0x00
 
-# CHECK: sra a0,v1,0x7
-0xc3 0x21 0x03 0x00
-
-# CHECK: srav  v0,v1,a1
+# CHECK: srav  $2, $3, $5
 0x07 0x10 0xa3 0x00
 
-# CHECK: srl a0,v1,0x7
+# CHECK: srl $4, $3, 7
 0xc2 0x21 0x03 0x00
 
-# CHECK: srlv  v0,v1,a1
+# CHECK: srlv  $2, $3, $5
 0x06 0x10 0xa3 0x00
 
-# CHECK: sub.d $f8,$f12,$f14
+# CHECK: sub.d $f8, $f12, $f14
 0x01 0x62 0x2e 0x46
 
-# CHECK: sub.s $f9,$f6,$f7
+# CHECK: sub.s $f9, $f6, $f7
 0x41 0x32 0x07 0x46
 
-# CHECK: sub t1,a2,a3
+# CHECK: sub $9,  $6, $7
 0x22 0x48 0xc7 0x00
 
-# CHECK: subu  a0,v1,a1
+# CHECK: subu  $4, $3, $5
 0x23 0x20 0x65 0x00
 
-# CHECK: sw  a0,24(a1)
+# CHECK: sw  $4, 24($5)
 0x18 0x00 0xa4 0xac
 
-# CHECK: swc1  $f9,9158(a3)
+# CHECK: swc1  $f9, 9158($7)
 0xc6 0x23 0xe9 0xe4
 
-# CHECK: sync  0x7
+# CHECK: swl $4,  16($5)
+0x10 0x00 0xa4 0xa8
+
+# CHECK: swr $6, 16($7)
+0x10 0x00 0xe6 0xb8
+
+# CHECK: sync  7
 0xcf 0x01 0x00 0x00
 
-# CHECK: trunc.w.d $f12,$f14
+# CHECK: trunc.w.d $f12, $f14
 0x0d 0x73 0x20 0x46
 
-# CHECK: trunc.w.s $f6,$f7
+# CHECK: trunc.w.s $f6, $f7
 0x8d 0x39 0x00 0x46
 
-# CHECK: wsbh  a2,a3
+# CHECK: wsbh  $6, $7
 0xa0 0x30 0x07 0x7c
 
-# CHECK: xor v1,v1,a1
+# CHECK: xor $3, $3, $5
 0x26 0x18 0x65 0x00
 
-# CHECK: xori  t1,a2,0x4567
+# CHECK: xori  $9,  $6, 17767
 0x67 0x45 0xc9 0x38

Modified: llvm/trunk/test/MC/Disassembler/Mips/mips64.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/Mips/mips64.txt?rev=160143&r1=160142&r2=160143&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/Mips/mips64.txt (original)
+++ llvm/trunk/test/MC/Disassembler/Mips/mips64.txt Thu Jul 12 16:19:32 2012
@@ -1,67 +1,67 @@
-# RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux
-
-# CHECK: daddiu t3,k0,31949
+# RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux | FileCheck %s
+# CHECK: .section        __TEXT,__text,regular,pure_instructions
+# CHECK: daddiu $11, $26, 31949
 0x67 0x4b 0x7c 0xcd
 
-# CHECK: daddu k0,at,t3
+# CHECK: daddu $26, $at, $11
 0x00 0x2b 0xd0 0x2d
 
-# CHECK: ddiv zero,k0,s6
+# CHECK: ddiv $zero, $26, $22
 0x03 0x56 0x00 0x1e
 
-# CHECK: ddivu zero,t1,t8
+# CHECK: ddivu $zero, $9, $24
 0x01 0x38 0x00 0x1f
 
-# CHECK: dmfc1 v0,$f14
+# CHECK: dmfc1 $2, $f14
 0x44 0x22 0x70 0x00
 
-# CHECK: dmtc1 s7,$f5
+# CHECK: dmtc1 $23, $f5
 0x44 0xb7 0x28 0x00
 
-# CHECK: dmult t3,k0
+# CHECK: dmult $11, $26
 0x01 0x7a 0x00 0x1c
 
-# CHECK: dmultu s7,t5
+# CHECK: dmultu $23, $13
 0x02 0xed 0x00 0x1d
 
-# CHECK: dsll v1,t8,0x11
+# CHECK: dsll $3, $24, 17
 0x00 0x18 0x1c 0x78
 
-# CHECK: dsllv gp,k1,t8
+# CHECK: dsllv $gp, $27, $24
 0x03 0x1b 0xe0 0x14
 
-# CHECK: dsra at,at,0x1e
+# CHECK: dsra $at, $at, 30
 0x00 0x01 0x0f 0xbb
 
-# CHECK: dsrav at,at,s8
+# CHECK: dsrav $at, $at, $fp
 0x03 0xc1 0x08 0x17
 
-# CHECK: dsrl t2,gp,0x18
+# CHECK: dsrl $10, $gp, 24
 0x00 0x1c 0x56 0x3a
 
-# CHECK: dsrlv gp,t2,s7
+# CHECK: dsrlv $gp, $10, $23
 0x02 0xea 0xe0 0x16
 
-# CHECK: dsubu gp,k1,t8
+# CHECK: dsubu $gp, $27, $24
 0x03 0x78 0xe0 0x2f
 
-# CHECK: lw k1,-15155(at)
+# CHECK: lw $27, -15155($at)
 0x8c 0x3b 0xc4 0xcd
 
-# CHECK: lui at,0x1
+# CHECK: lui $at, 1
 0x3c 0x01 0x00 0x01
 
-# CHECK: lwu v1,-1746(v1)
+# CHECK: lwu $3, -1746($3)
 0x9c 0x63 0xf9 0x2e
 
-# CHECK: lui ra,0x1
+# CHECK: lui $ra, 1
 0x3c 0x1f 0x00 0x01
 
-# CHECK: sw k0,-15159(at)
+# CHECK: sw $26, -15159($at)
 0xac 0x3a 0xc4 0xc9
 
-# CHECK: ld k0,3958(zero)
+# CHECK: ld $26, 3958($zero)
 0xdc 0x1a 0x0f 0x76
 
-# CHECK: sd a2,17767(zero)
+# CHECK: sd $6, 17767($zero)
 0xfc 0x06 0x45 0x67

Modified: llvm/trunk/test/MC/Disassembler/Mips/mips64_le.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/Mips/mips64_le.txt?rev=160143&r1=160142&r2=160143&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/Mips/mips64_le.txt (original)
+++ llvm/trunk/test/MC/Disassembler/Mips/mips64_le.txt Thu Jul 12 16:19:32 2012
@@ -1,67 +1,67 @@
-# RUN: llvm-mc --disassemble %s -triple=mips64el-unknown-linux
-
-# CHECK: daddiu t3,k0,31949
+# RUN: llvm-mc --disassemble %s -triple=mips64el-unknown-linux | FileCheck %s
+# CHECK: .section        __TEXT,__text,regular,pure_instructions
+# CHECK: daddiu $11, $26, 31949
 0xcd 0x7c 0x4b 0x67
 
-# CHECK: daddu k0,at,t3
+# CHECK: daddu $26, $at, $11
 0x2d 0xd0 0x2b 0x00
 
-# CHECK: ddiv zero,k0,s6
+# CHECK: ddiv $zero, $26, $22
 0x1e 0x00 0x56 0x03
 
-# CHECK: ddivu zero,t1,t8
+# CHECK: ddivu $zero, $9, $24
 0x1f 0x00 0x38 0x01
 
-# CHECK: dmfc1 v0,$f14
+# CHECK: dmfc1 $2, $f14
 0x00 0x70 0x22 0x44
 
-# CHECK: dmtc1 s7,$f5
+# CHECK: dmtc1 $23, $f5
 0x00 0x28 0xb7 0x44
 
-# CHECK: dmult t3,k0
+# CHECK: dmult $11, $26
 0x1c 0x00 0x7a 0x01
 
-# CHECK: dmultu s7,t5
+# CHECK: dmultu $23, $13
 0x1d 0x00 0xed 0x02
 
-# CHECK: dsll v1,t8,0x11
+# CHECK: dsll $3, $24, 17
 0x78 0x1c 0x18 0x00
 
-# CHECK: dsllv gp,k1,t8
+# CHECK: dsllv $gp, $27, $24
 0x14 0xe0 0x1b 0x03
 
-# CHECK: dsra at,at,0x1e
+# CHECK: dsra $at, $at, 30
 0xbb 0x0f 0x01 0x00
 
-# CHECK: dsrav at,at,s8
+# CHECK: dsrav $at, $at, $fp
 0x17 0x08 0xc1 0x03
 
-# CHECK: dsrl t2,gp,0x18
+# CHECK: dsrl $10, $gp, 24
 0x3a 0x56 0x1c 0x00
 
-# CHECK: dsrlv gp,t2,s7
+# CHECK: dsrlv $gp, $10, $23
 0x16 0xe0 0xea 0x02
 
-# CHECK: dsubu gp,k1,t8
+# CHECK: dsubu $gp, $27, $24
 0x2f 0xe0 0x78 0x03
 
-# CHECK: lw k1,-15155(at)
+# CHECK: lw $27, -15155($at)
 0xcd 0xc4 0x3b 0x8c
 
-# CHECK: lui at,0x1
+# CHECK: lui $at, 1
 0x01 0x00 0x01 0x3c
 
-# CHECK: lwu v1,-1746(v1)
+# CHECK: lwu $3, -1746($3)
 0x2e 0xf9 0x63 0x9c
 
-# CHECK: lui ra,0x1
+# CHECK: lui $ra, 1
 0x01 0x00 0x1f 0x3c
 
-# CHECK: sw k0,-15159(at)
+# CHECK: sw $26, -15159($at)
 0xc9 0xc4 0x3a 0xac
 
-# CHECK: ld k0,3958(zero)
+# CHECK: ld $26, 3958($zero)
 0x76 0x0f 0x1a 0xdc
 
-# CHECK: sd a2,17767(zero)
+# CHECK: sd $6, 17767($zero)
 0x67 0x45 0x06 0xfc

Modified: llvm/trunk/test/MC/Disassembler/Mips/mips64r2.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/Mips/mips64r2.txt?rev=160143&r1=160142&r2=160143&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/Mips/mips64r2.txt (original)
+++ llvm/trunk/test/MC/Disassembler/Mips/mips64r2.txt Thu Jul 12 16:19:32 2012
@@ -1,91 +1,91 @@
-# RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mattr +mips64r2
-
-# CHECK: daddiu t3,k0,31949
+# RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mattr +mips64r2 | FileCheck %s
+# CHECK: .section        __TEXT,__text,regular,pure_instructions
+# CHECK: daddiu $11, $26, 31949
 0x67 0x4b 0x7c 0xcd
 
-# CHECK: daddu k0,at,t3
+# CHECK: daddu $26, $at, $11
 0x00 0x2b 0xd0 0x2d
 
-# CHECK: ddiv zero,k0,s6
+# CHECK: ddiv $zero, $26, $22
 0x03 0x56 0x00 0x1e
 
-# CHECK: ddivu zero,t1,t8
+# CHECK: ddivu $zero, $9, $24
 0x01 0x38 0x00 0x1f
 
-# CHECK: dmfc1 v0,$f14
+# CHECK: dmfc1 $2, $f14
 0x44 0x22 0x70 0x00
 
-# CHECK: dmtc1 s7,$f5
+# CHECK: dmtc1 $23, $f5
 0x44 0xb7 0x28 0x00
 
-# CHECK: dmult t3,k0
+# CHECK: dmult $11, $26
 0x01 0x7a 0x00 0x1c
 
-# CHECK: dmultu s7,t5
+# CHECK: dmultu $23, $13
 0x02 0xed 0x00 0x1d
 
-# CHECK: dsll v1,t8,0x11
+# CHECK: dsll $3, $24, 17
 0x00 0x18 0x1c 0x78
 
-# CHECK: dsllv gp,k1,t8
+# CHECK: dsllv $gp, $27, $24
 0x03 0x1b 0xe0 0x14
 
-# CHECK: dsra at,at,0x1e
+# CHECK: dsra $at, $at, 30
 0x00 0x01 0x0f 0xbb
 
-# CHECK: dsrav at,at,s8
+# CHECK: dsrav $at, $at, $fp
 0x03 0xc1 0x08 0x17
 
-# CHECK: dsrl t2,gp,0x18
+# CHECK: dsrl $10, $gp, 24
 0x00 0x1c 0x56 0x3a
 
-# CHECK: dsrlv gp,t2,s7
+# CHECK: dsrlv $gp, $10, $23
 0x02 0xea 0xe0 0x16
 
-# CHECK: dsubu gp,k1,t8
+# CHECK: dsubu $gp, $27, $24
 0x03 0x78 0xe0 0x2f
 
-# CHECK: lw k1,-15155(at)
+# CHECK: lw $27, -15155($at)
 0x8c 0x3b 0xc4 0xcd
 
-# CHECK: lui at,0x1
+# CHECK: lui $at, 1
 0x3c 0x01 0x00 0x01
 
-# CHECK: lwu v1,-1746(v1)
+# CHECK: lwu $3, -1746($3)
 0x9c 0x63 0xf9 0x2e
 
-# CHECK: lui ra,0x1
+# CHECK: lui $ra, 1
 0x3c 0x1f 0x00 0x01
 
-# CHECK: sw k0,-15159(at)
+# CHECK: sw $26, -15159($at)
 0xac 0x3a 0xc4 0xc9
 
-# CHECK: ld k0,3958(zero)
+# CHECK: ld $26, 3958($zero)
 0xdc 0x1a 0x0f 0x76
 
-# CHECK: sd a2,17767(zero)
+# CHECK: sd $6, 17767($zero)
 0xfc 0x06 0x45 0x67
 
-# CHECK: dclo t1,t8
+# CHECK: dclo $9, $24
 0x73 0x09 0x48 0x25
 
-# CHECK: dclz k0,t1
+# CHECK: dclz $26, $9
 0x71 0x3a 0xd0 0x24
 
-# CHECK: dext a3,gp,0x1d,0x1f
+# CHECK: dext $7, $gp, 29, 31
 0x7f 0x87 0xf7 0x43
 
-# CHECK: dins s4,gp,0xf,0x1
+# CHECK: dins $20, $gp, 15, 1
 0x7f 0x94 0x7b 0xc7
 
-# CHECK: dsbh a3,gp
+# CHECK: dsbh $7, $gp
 0x7c 0x1c 0x38 0xa4
 
-# CHECK: dshd v1,t6
+# CHECK: dshd $3, $14
 0x7c 0x0e 0x19 0x64
 
-# CHECK: drotr s4,k1,0x6
+# CHECK: drotr $20, $27, 6
 0x00 0x3b 0xa1 0xba
 
-# CHECK: drotrv t8,s7,a1
+# CHECK: drotrv $24, $23, $5
 0x00 0xb7 0xc0 0x56

Modified: llvm/trunk/test/MC/Disassembler/Mips/mips64r2_le.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/Mips/mips64r2_le.txt?rev=160143&r1=160142&r2=160143&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/Mips/mips64r2_le.txt (original)
+++ llvm/trunk/test/MC/Disassembler/Mips/mips64r2_le.txt Thu Jul 12 16:19:32 2012
@@ -1,91 +1,91 @@
-# RUN: llvm-mc --disassemble %s -triple=mips64el-unknown-linux -mattr +mips64r2
-
-# CHECK: daddiu t3,k0,31949
+# RUN: llvm-mc --disassemble %s -triple=mips64el-unknown-linux -mattr +mips64r2 | FileCheck %s
+# CHECK: .section        __TEXT,__text,regular,pure_instructions
+# CHECK: daddiu $11, $26, 31949
 0xcd 0x7c 0x4b 0x67
 
-# CHECK: daddu k0,at,t3
+# CHECK: daddu $26, $at, $11
 0x2d 0xd0 0x2b 0x00
 
-# CHECK: ddiv zero,k0,s6
+# CHECK: ddiv $zero, $26, $22
 0x1e 0x00 0x56 0x03
 
-# CHECK: ddivu zero,t1,t8
+# CHECK: ddivu $zero, $9, $24
 0x1f 0x00 0x38 0x01
 
-# CHECK: dmfc1 v0,$f14
+# CHECK: dmfc1 $2, $f14
 0x00 0x70 0x22 0x44
 
-# CHECK: dmtc1 s7,$f5
+# CHECK: dmtc1 $23, $f5
 0x00 0x28 0xb7 0x44
 
-# CHECK: dmult t3,k0
+# CHECK: dmult $11, $26
 0x1c 0x00 0x7a 0x01
 
-# CHECK: dmultu s7,t5
+# CHECK: dmultu $23, $13
 0x1d 0x00 0xed 0x02
 
-# CHECK: dsll v1,t8,0x11
+# CHECK: dsll $3, $24, 17
 0x78 0x1c 0x18 0x00
 
-# CHECK: dsllv gp,k1,t8
+# CHECK: dsllv $gp, $27, $24
 0x14 0xe0 0x1b 0x03
 
-# CHECK: dsra at,at,0x1e
+# CHECK: dsra $at, $at, 30
 0xbb 0x0f 0x01 0x00
 
-# CHECK: dsrav at,at,s8
+# CHECK: dsrav $at, $at, $fp
 0x17 0x08 0xc1 0x03
 
-# CHECK: dsrl t2,gp,0x18
+# CHECK: dsrl $10, $gp, 24
 0x3a 0x56 0x1c 0x00
 
-# CHECK: dsrlv gp,t2,s7
+# CHECK: dsrlv $gp, $10, $23
 0x16 0xe0 0xea 0x02
 
-# CHECK: dsubu gp,k1,t8
+# CHECK: dsubu $gp, $27, $24
 0x2f 0xe0 0x78 0x03
 
-# CHECK: lw k1,-15155(at)
+# CHECK: lw $27, -15155($at)
 0xcd 0xc4 0x3b 0x8c
 
-# CHECK: lui at,0x1
+# CHECK: lui $at, 1
 0x01 0x00 0x01 0x3c
 
-# CHECK: lwu v1,-1746(v1)
+# CHECK: lwu $3, -1746($3)
 0x2e 0xf9 0x63 0x9c
 
-# CHECK: lui ra,0x1
+# CHECK: lui $ra, 1
 0x01 0x00 0x1f 0x3c
 
-# CHECK: sw k0,-15159(at)
+# CHECK: sw $26, -15159($at)
 0xc9 0xc4 0x3a 0xac
 
-# CHECK: ld k0,3958(zero)
+# CHECK: ld $26, 3958($zero)
 0x76 0x0f 0x1a 0xdc
 
-# CHECK: sd a2,17767(zero)
+# CHECK: sd $6, 17767($zero)
 0x67 0x45 0x06 0xfc
 
-# CHECK: dclo t1,t8
+# CHECK: dclo $9, $24
 0x25 0x48 0x09 0x73
 
-# CHECK: dclz k0,t1
+# CHECK: dclz $26, $9
 0x24 0xd0 0x3a 0x71
 
-# CHECK: dext a3,gp,0x1d,0x1f
+# CHECK: dext $7, $gp, 29, 31
 0x43 0xf7 0x87 0x7f
 
-# CHECK: dins s4,gp,0xf,0x1
+# CHECK: dins $20, $gp, 15, 1
 0xc7 0x7b 0x94 0x7f
 
-# CHECK: dsbh a3,gp
+# CHECK: dsbh $7, $gp
 0xa4 0x38 0x1c 0x7c
 
-# CHECK: dshd v1,t6
+# CHECK: dshd $3, $14
 0x64 0x19 0x0e 0x7c
 
-# CHECK: drotr s4,k1,0x6
+# CHECK: drotr $20, $27, 6
 0xba 0xa1 0x3b 0x00
 
-# CHECK: drotrv t8,s7,a1
+# CHECK: drotrv $24, $23, $5
 0x56 0xc0 0xb7 0x00





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