[llvm-commits] [llvm] r159694 - in /llvm/trunk: include/llvm/CodeGen/Passes.h include/llvm/InitializePasses.h include/llvm/Target/TargetInstrInfo.h lib/CodeGen/CMakeLists.txt lib/CodeGen/CodeGen.cpp lib/CodeGen/EarlyIfConversion.cpp lib/CodeGen/Passes.cpp

[Hal Finkel]

On Tue, 3 Jul 2012 18:13:00 -0700
Jakob Stoklund Olesen <stoklund at 2pi.dk> wrote:

> 
> On Jul 3, 2012, at 5:26 PM, Hal Finkel <hfinkel at anl.gov> wrote:
> 
> >> Add an experimental early if-conversion pass, off by default.
> > 
> > Cool. I can probably use this on PPC as well.
> 
> I expect you can.
> 
> > How does this differ from CodeGen/IfConversion.cpp?
> 
> The late if-conversion pass uses predication, so it only works on
> architectures like ARM that can predicate most instructions. The
> predication means that the pass can run after register allocation, it
> will never increase register pressure.
> 
> The early if-conversion pass will speculatively execute both sides of
> a branch, and then insert a select instruction to choose the result.
> It only really makes sense for out-of-order CPUs where the speculated
> instructions can be hidden as extra ILP.
> 
> The TBD heuristics will assume an out-of-order super-scalar CPU, but
> I suppose an in-order super-scalar micro-architecture can benefit as
> well once Andy's MI scheduler is up and running.

Sounds good.

Perhaps this is unavoidable, but it seems like we're going to end up
with at least three if-conversion passes. Two in CodeGen and at least
one IR-level pass. An IR-level pass seems necessary for vectorization
(and Ralf already has one written as part of his WFV project:
https://github.com/karrenberg/wfv/tree/master/src/functionPasses). Do
you think there is any way in which we can or should tie all these
things together?

Thanks again,
Hal

> 
> /jakob
> 



-- 
Hal Finkel
Postdoctoral Appointee
Leadership Computing Facility
Argonne National Laboratory