[llvm-commits] [llvm] r159802 - /llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp

[Jack Carter]

Author: jacksprat
Date: Thu Jul  5 21:44:22 2012
New Revision: 159802

URL: http://llvm.org/viewvc/llvm-project?rev=159802&view=rev
Log:
   Changes per review of commit 159787

   Mips specific inline asm operand modifier D.
   
   Comment changes and predicate change.
   
   

Modified:
    llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp

Modified: llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp?rev=159802&r1=159801&r2=159802&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp Thu Jul  5 21:44:22 2012
@@ -333,7 +333,6 @@
         O << "$0";
       return false;
     }
-    // This will be shared with other cases in succeeding checkins
     case 'D': {
       // Second part of a double word register operand
       if (OpNum == 0)
@@ -343,9 +342,10 @@
         return true;
       unsigned Flags = FlagsOP.getImm();
       unsigned NumVals = InlineAsm::getNumOperandRegisters(Flags);
+      // Number of registers represented by this operand. We are looking
+      // for 2 for 32 bit mode and 1 for 64 bit mode.
       if (NumVals != 2) {
-        if (!Subtarget->isGP32bit() && NumVals == 1 && MO.isReg()) {
-          // In 64 bit mode long longs are always just a single reg
+        if (Subtarget->isGP64bit() && NumVals == 1 && MO.isReg()) {
           unsigned Reg = MO.getReg();
           O << '$' << MipsInstPrinter::getRegisterName(Reg);
           return false;
@@ -354,7 +354,6 @@
       }
       unsigned RegOp;
       switch(ExtraCode[0]) {
-      // This will have other cases in succeeding checkins
       case 'D':
         RegOp = (!Subtarget->isGP32bit()) ? OpNum : OpNum + 1;
         break;
@@ -368,8 +367,8 @@
       O << '$' << MipsInstPrinter::getRegisterName(Reg);
       return false;
     }
-    } // switch
-  } // if ExtraCode
+    }
+  }
 
   printOperand(MI, OpNum, O);
   return false;