[llvm-commits] [llvm] r159121 - /llvm/trunk/lib/CodeGen/PHIElimination.cpp

Rafael Espíndola rafael.espindola at gmail.com
Mon Jun 25 16:47:50 PDT 2012


This caused pr13209.

On 24 June 2012 23:36, Jakob Stoklund Olesen <stoklund at 2pi.dk> wrote:
> Author: stoklund
> Date: Sun Jun 24 22:36:12 2012
> New Revision: 159121
>
> URL: http://llvm.org/viewvc/llvm-project?rev=159121&view=rev
> Log:
> Teach PHIElimination to handle <undef> operands.
>
> When a PHI use is <undef>, don't emit a copy in the predecessor block,
> but insert an IMPLICIT_DEF instruction instead. This ensures that
> virtual register uses are always jointly dominated by defs, even if some
> of them are IMPLICIT_DEF.
>
> Modified:
>    llvm/trunk/lib/CodeGen/PHIElimination.cpp
>
> Modified: llvm/trunk/lib/CodeGen/PHIElimination.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PHIElimination.cpp?rev=159121&r1=159120&r2=159121&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/PHIElimination.cpp (original)
> +++ llvm/trunk/lib/CodeGen/PHIElimination.cpp Sun Jun 24 22:36:12 2012
> @@ -171,21 +171,28 @@
>   return true;
>  }
>
> +/// isImplicitlyDefined - Return true if all defs of VirtReg are implicit-defs.
> +/// This includes registers with no defs.
> +static bool isImplicitlyDefined(unsigned VirtReg,
> +                                const MachineRegisterInfo *MRI) {
> +  for (MachineRegisterInfo::def_iterator DI = MRI->def_begin(VirtReg),
> +       DE = MRI->def_end(); DI != DE; ++DI)
> +    if (!DI->isImplicitDef())
> +      return false;
> +  return true;
> +}
> +
>  /// isSourceDefinedByImplicitDef - Return true if all sources of the phi node
>  /// are implicit_def's.
>  static bool isSourceDefinedByImplicitDef(const MachineInstr *MPhi,
>                                          const MachineRegisterInfo *MRI) {
> -  for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) {
> -    unsigned SrcReg = MPhi->getOperand(i).getReg();
> -    const MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
> -    if (!DefMI || !DefMI->isImplicitDef())
> +  for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2)
> +    if (!isImplicitlyDefined(MPhi->getOperand(i).getReg(), MRI))
>       return false;
> -  }
>   return true;
>  }
>
>
> -
>  /// LowerAtomicPHINode - Lower the PHI node at the top of the specified block,
>  /// under the assuption that it needs to be lowered in a way that supports
>  /// atomic execution of PHIs.  This lowering method is always correct all of the
> @@ -287,7 +294,8 @@
>   for (int i = NumSrcs - 1; i >= 0; --i) {
>     unsigned SrcReg = MPhi->getOperand(i*2+1).getReg();
>     unsigned SrcSubReg = MPhi->getOperand(i*2+1).getSubReg();
> -
> +    bool SrcUndef = MPhi->getOperand(i*2+1).isUndef() ||
> +      isImplicitlyDefined(SrcReg, MRI);
>     assert(TargetRegisterInfo::isVirtualRegister(SrcReg) &&
>            "Machine PHI Operands must all be virtual registers!");
>
> @@ -295,14 +303,6 @@
>     // path the PHI.
>     MachineBasicBlock &opBlock = *MPhi->getOperand(i*2+2).getMBB();
>
> -    // If source is defined by an implicit def, there is no need to insert a
> -    // copy.
> -    MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
> -    if (DefMI->isImplicitDef()) {
> -      ImpDefs.insert(DefMI);
> -      continue;
> -    }
> -
>     // Check to make sure we haven't already emitted the copy for this block.
>     // This can happen because PHI nodes may have multiple entries for the same
>     // basic block.
> @@ -315,12 +315,27 @@
>       findPHICopyInsertPoint(&opBlock, &MBB, SrcReg);
>
>     // Insert the copy.
> -    if (!reusedIncoming && IncomingReg)
> -      BuildMI(opBlock, InsertPos, MPhi->getDebugLoc(),
> -              TII->get(TargetOpcode::COPY), IncomingReg).addReg(SrcReg, 0, SrcSubReg);
> +    if (!reusedIncoming && IncomingReg) {
> +      if (SrcUndef) {
> +        // The source register is undefined, so there is no need for a real
> +        // COPY, but we still need to ensure joint dominance by defs.
> +        // Insert an IMPLICIT_DEF instruction.
> +        BuildMI(opBlock, InsertPos, MPhi->getDebugLoc(),
> +                TII->get(TargetOpcode::IMPLICIT_DEF), IncomingReg);
> +
> +        // Clean up the old implicit-def, if there even was one.
> +        if (MachineInstr *DefMI = MRI->getVRegDef(SrcReg))
> +          if (DefMI->isImplicitDef())
> +            ImpDefs.insert(DefMI);
> +      } else {
> +        BuildMI(opBlock, InsertPos, MPhi->getDebugLoc(),
> +                TII->get(TargetOpcode::COPY), IncomingReg)
> +          .addReg(SrcReg, 0, SrcSubReg);
> +      }
> +    }
>
>     // Now update live variable information if we have it.  Otherwise we're done
> -    if (!LV) continue;
> +    if (SrcUndef || !LV) continue;
>
>     // We want to be able to insert a kill of the register if this PHI (aka, the
>     // copy we just inserted) is the last use of the source value.  Live
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits




More information about the llvm-commits mailing list