[llvm-commits] [llvm] r157868 - in /llvm/trunk/test/CodeGen/Mips: cmov.ll swzero.ll unalignedload.ll

[Akira Hatanaka]

Author: ahatanak
Date: Fri Jun  1 19:05:45 2012
New Revision: 157868

URL: http://llvm.org/viewvc/llvm-project?rev=157868&view=rev
Log:
Fix test cases in test/CodeGen/Mips.

Modified:
    llvm/trunk/test/CodeGen/Mips/cmov.ll
    llvm/trunk/test/CodeGen/Mips/swzero.ll
    llvm/trunk/test/CodeGen/Mips/unalignedload.ll

Modified: llvm/trunk/test/CodeGen/Mips/cmov.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/cmov.ll?rev=157868&r1=157867&r2=157868&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/cmov.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/cmov.ll Fri Jun  1 19:05:45 2012
@@ -5,10 +5,12 @@
 @i1 = global [3 x i32] [i32 1, i32 2, i32 3], align 4
 @i3 = common global i32* null, align 4
 
-; O32:  lw  ${{[0-9]+}}, %got(i3)
-; O32:  addiu ${{[0-9]+}}, ${{[a-z0-9]+}}, %got(i1)
-; N64:  ld  ${{[0-9]+}}, %got_disp(i3)
-; N64:  daddiu ${{[0-9]+}}, ${{[0-9]+}}, %got_disp(i1)
+; O32:  lw $[[R0:[0-9]+]], %got(i3)
+; O32:  addiu $[[R1:[0-9]+]], ${{[0-9]+}}, %got(i1) 
+; O32:  movn $[[R0]], $[[R1]], ${{[0-9]+}} 
+; N64:  ldr $[[R0:[0-9]+]] 
+; N64:  ld $[[R1:[0-9]+]], %got_disp(i1)
+; N64:  movn $[[R0]], $[[R1]], ${{[0-9]+}} 
 define i32* @cmov1(i32 %s) nounwind readonly {
 entry:
   %tobool = icmp ne i32 %s, 0

Modified: llvm/trunk/test/CodeGen/Mips/swzero.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/swzero.ll?rev=157868&r1=157867&r2=157868&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/swzero.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/swzero.ll Fri Jun  1 19:05:45 2012
@@ -4,7 +4,7 @@
 
 define void @zero_u(%struct.unaligned* nocapture %p) nounwind {
 entry:
-; CHECK: usw $zero
+; CHECK: swr $zero
   %x = getelementptr inbounds %struct.unaligned* %p, i32 0, i32 0
   store i32 0, i32* %x, align 1
   ret void

Modified: llvm/trunk/test/CodeGen/Mips/unalignedload.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/unalignedload.ll?rev=157868&r1=157867&r2=157868&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/unalignedload.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/unalignedload.ll Fri Jun  1 19:05:45 2012
@@ -9,27 +9,17 @@
 
 define void @foo1() nounwind {
 entry:
-; CHECK-EL: ulhu  $4, 2
-; CHECK-EL: lw  $25, %call16(foo2)
-; CHECK-EL: lw  $[[R0:[0-9]+]], %got(s4)
-; CHECK-EL: lbu $[[R1:[0-9]+]], 6($[[R0]])
-; CHECK-EL: sll $[[R3:[0-9]+]], $[[R1]], 16
-; CHECK-EL: ulhu  $[[R2:[0-9]+]], 4($[[R0]])
-; CHECK-EL: or  $5, $[[R2]], $[[R3]]
-; CHECK-EL: ulw $4, 0($[[R0]])
-; CHECK-EL: lw  $25, %call16(foo4)
+; CHECK-EL: lbu ${{[0-9]+}}, 2($[[R0:[0-9]+]])
+; CHECK-EL: lbu ${{[0-9]+}}, 3($[[R0]])
+; CHECK-EL: jalr
+; CHECK-EL: lwl $[[R1:[0-9]+]], 3($[[R2:[0-9]+]])
+; CHECK-EL: lwr $[[R1]], 0($[[R2]])
 
-; CHECK-EB: ulhu  $[[R0:[0-9]+]], 2
-; CHECK-EB: sll $4, $[[R0]], 16
-; CHECK-EB: lw  $25, %call16(foo2)
-; CHECK-EB: lw  $[[R1:[0-9]+]], %got(s4)
-; CHECK-EB: lbu $[[R3:[0-9]+]], 6($[[R1]])
-; CHECK-EB: sll $[[R5:[0-9]+]], $[[R3]], 8
-; CHECK-EB: ulhu  $[[R2:[0-9]+]], 4($[[R1]])
-; CHECK-EB: sll $[[R4:[0-9]+]], $[[R2]], 16
-; CHECK-EB: or  $5, $[[R4]], $[[R5]]
-; CHECK-EB: ulw $4, 0($[[R1]])
-; CHECK-EB: lw  $25, %call16(foo4)
+; CHECK-EB: lbu ${{[0-9]+}}, 3($[[R0:[0-9]+]])
+; CHECK-EB: lbu ${{[0-9]+}}, 2($[[R0]])
+; CHECK-EB: jalr
+; CHECK-EB: lwl $[[R1:[0-9]+]], 0($[[R2:[0-9]+]])
+; CHECK-BE: lwr $[[R1]], 3($[[R2]])
 
   tail call void @foo2(%struct.S1* byval getelementptr inbounds (%struct.S2* @s2, i32 0, i32 1)) nounwind
   tail call void @foo4(%struct.S4* byval @s4) nounwind