[llvm-commits] [llvm] r157695 - in /llvm/trunk/include/llvm: MC/MCRegisterInfo.h Target/TargetRegisterInfo.h

[Jakob Stoklund Olesen]

Author: stoklund
Date: Wed May 30 11:36:28 2012
New Revision: 157695

URL: http://llvm.org/viewvc/llvm-project?rev=157695&view=rev
Log:
Add MCRegisterInfo::RegListIterator.

Also add subclasses MCSubRegIterator, MCSuperRegIterator, and
MCRegAliasIterator.

These iterators provide an abstract interface to the MCRegisterInfo
register lists so the internal representation can be changed without
changing all clients.

Modified:
    llvm/trunk/include/llvm/MC/MCRegisterInfo.h
    llvm/trunk/include/llvm/Target/TargetRegisterInfo.h

Modified: llvm/trunk/include/llvm/MC/MCRegisterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCRegisterInfo.h?rev=157695&r1=157694&r2=157695&view=diff
==============================================================================
--- llvm/trunk/include/llvm/MC/MCRegisterInfo.h (original)
+++ llvm/trunk/include/llvm/MC/MCRegisterInfo.h Wed May 30 11:36:28 2012
@@ -167,6 +167,25 @@
   DenseMap<unsigned, int> L2SEHRegs;          // LLVM to SEH regs mapping
 
 public:
+  /// RegListIterator. This iterator class is used to traverse lists of
+  /// super-registers, sub-registers, and overlapping registers. Don't use it
+  /// directly, use one of the sub-classes defined below.
+  class RegListIterator {
+    const uint16_t *Pos;
+  public:
+    explicit RegListIterator(const uint16_t *Table)
+      : Pos(Table) {}
+
+    /// isValid - Return false when the end of the list is reached.
+    bool isValid() const { return *Pos; }
+
+    /// Dereference the iterator to get the current register.
+    unsigned operator*() const { return *Pos; }
+
+    /// Pre-increment. Move to the next register.
+    void operator++() { ++Pos; }
+  };
+
   /// DiffListIterator - Base iterator class that can traverse the
   /// differentially encoded register and regunit lists in DiffLists.
   /// Don't use this class directly, use one of the specialized sub-classes
@@ -213,8 +232,11 @@
     }
   };
 
-  // These iterators are allowed to sub-class DiffListIterator and access
-  // internal list pointers.
+  // These iterators are allowed to sub-class RegListIterator and
+  // DiffListIterator and access internal list pointers.
+  friend class MCSubRegIterator;
+  friend class MCSuperRegIterator;
+  friend class MCRegAliasIterator;
   friend class MCRegUnitIterator;
 
   /// InitMCRegisterInfo - Initialize MCRegisterInfo, called by TableGen
@@ -438,6 +460,36 @@
 };
 
 //===----------------------------------------------------------------------===//
+//                          Register List Iterators
+//===----------------------------------------------------------------------===//
+
+// MCRegisterInfo provides lists of super-registers, sub-registers, and
+// aliasing registers. Use these iterator classes to traverse the lists.
+
+/// MCSubRegIterator enumerates all sub-registers of Reg.
+class MCSubRegIterator : public MCRegisterInfo::RegListIterator {
+public:
+  MCSubRegIterator(unsigned Reg, const MCRegisterInfo *MCRI)
+    : RegListIterator(MCRI->RegLists + MCRI->get(Reg).SubRegs) {}
+};
+
+/// MCSuperRegIterator enumerates all super-registers of Reg.
+class MCSuperRegIterator : public MCRegisterInfo::RegListIterator {
+public:
+  MCSuperRegIterator(unsigned Reg, const MCRegisterInfo *MCRI)
+    : RegListIterator(MCRI->RegLists + MCRI->get(Reg).SuperRegs) {}
+};
+
+/// MCRegAliasIterator enumerates all registers aliasing Reg.
+/// If IncludeSelf is set, Reg itself is included in the list.
+class MCRegAliasIterator : public MCRegisterInfo::RegListIterator {
+public:
+  MCRegAliasIterator(unsigned Reg, const MCRegisterInfo *MCRI, bool IncludeSelf)
+    : RegListIterator(MCRI->RegLists + MCRI->get(Reg).Overlaps + !IncludeSelf)
+  {}
+};
+
+//===----------------------------------------------------------------------===//
 //                               Register Units
 //===----------------------------------------------------------------------===//
 

Modified: llvm/trunk/include/llvm/Target/TargetRegisterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetRegisterInfo.h?rev=157695&r1=157694&r2=157695&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetRegisterInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetRegisterInfo.h Wed May 30 11:36:28 2012
@@ -357,10 +357,10 @@
 
   /// isSuperRegister - Returns true if regB is a super-register of regA.
   ///
-  bool isSuperRegister(unsigned regA, unsigned regB) const {
-    for (const uint16_t *regList = getSuperRegisters(regA); *regList;++regList){
-      if (*regList == regB) return true;
-    }
+  bool isSuperRegister(unsigned RegA, unsigned RegB) const {
+    for (MCSuperRegIterator I(RegA, this); I.isValid(); ++I)
+      if (*I == RegB)
+        return true;
     return false;
   }