[llvm-commits] [llvm] r157375 - /llvm/trunk/lib/Target/Mips/Disassembler/MipsDisassembler.cpp

[Craig Topper]

Author: ctopper
Date: Thu May 24 01:09:56 2012
New Revision: 157375

URL: http://llvm.org/viewvc/llvm-project?rev=157375&view=rev
Log:
Use uint16_t to store registers in static tables. Matches other tables.

Modified:
    llvm/trunk/lib/Target/Mips/Disassembler/MipsDisassembler.cpp

Modified: llvm/trunk/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Disassembler/MipsDisassembler.cpp?rev=157375&r1=157374&r2=157375&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Disassembler/MipsDisassembler.cpp (original)
+++ llvm/trunk/lib/Target/Mips/Disassembler/MipsDisassembler.cpp Thu May 24 01:09:56 2012
@@ -97,7 +97,7 @@
 }
 
 // Decoder tables for Mips register
-static const unsigned CPURegsTable[] = {
+static const uint16_t CPURegsTable[] = {
   Mips::ZERO, Mips::AT, Mips::V0, Mips::V1,
   Mips::A0, Mips::A1, Mips::A2, Mips::A3,
   Mips::T0, Mips::T1, Mips::T2, Mips::T3,
@@ -108,7 +108,7 @@
   Mips::GP, Mips::SP, Mips::FP, Mips::RA
 };
 
-static const unsigned FGR32RegsTable[] = {
+static const uint16_t FGR32RegsTable[] = {
   Mips::F0, Mips::F1, Mips::F2, Mips::F3,
   Mips::F4, Mips::F5, Mips::F6, Mips::F7,
   Mips::F8, Mips::F9, Mips::F10, Mips::F11,
@@ -119,7 +119,7 @@
   Mips::F28, Mips::F29, Mips::F30, Mips::F31
 };
 
-static const unsigned CPU64RegsTable[] = {
+static const uint16_t CPU64RegsTable[] = {
   Mips::ZERO_64, Mips::AT_64, Mips::V0_64, Mips::V1_64,
   Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64,
   Mips::T0_64, Mips::T1_64, Mips::T2_64, Mips::T3_64,
@@ -130,7 +130,7 @@
   Mips::GP_64, Mips::SP_64, Mips::FP_64, Mips::RA_64
 };
 
-static const unsigned FGR64RegsTable[] = {
+static const uint16_t FGR64RegsTable[] = {
   Mips::D0_64,  Mips::D1_64,  Mips::D2_64,  Mips::D3_64,
   Mips::D4_64,  Mips::D5_64,  Mips::D6_64,  Mips::D7_64,
   Mips::D8_64,  Mips::D9_64,  Mips::D10_64, Mips::D11_64,
@@ -141,7 +141,7 @@
   Mips::D28_64, Mips::D29_64, Mips::D30_64, Mips::D31_64
 };
 
-static const unsigned AFGR64RegsTable[] = {
+static const uint16_t AFGR64RegsTable[] = {
   Mips::D0,  Mips::D1,  Mips::D2,  Mips::D3,
   Mips::D4,  Mips::D5,  Mips::D6,  Mips::D7,
   Mips::D8,  Mips::D9,  Mips::D10, Mips::D11,