[llvm-commits] [llvm] r157163 - /llvm/trunk/lib/CodeGen/TailDuplication.cpp

[Jakob Stoklund Olesen]

Author: stoklund
Date: Sun May 20 13:42:51 2012
New Revision: 157163

URL: http://llvm.org/viewvc/llvm-project?rev=157163&view=rev
Log:
Constrain register classes in TailDup.

When rewriting operands, make sure the new registers have a compatible
register class.

Modified:
    llvm/trunk/lib/CodeGen/TailDuplication.cpp

Modified: llvm/trunk/lib/CodeGen/TailDuplication.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TailDuplication.cpp?rev=157163&r1=157162&r2=157163&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/TailDuplication.cpp (original)
+++ llvm/trunk/lib/CodeGen/TailDuplication.cpp Sun May 20 13:42:51 2012
@@ -272,8 +272,8 @@
       continue;
     unsigned Dst = Copy->getOperand(0).getReg();
     unsigned Src = Copy->getOperand(1).getReg();
-    MachineRegisterInfo::use_iterator UI = MRI->use_begin(Src);
-    if (++UI == MRI->use_end()) {
+    if (MRI->hasOneNonDBGUse(Src) &&
+        MRI->constrainRegClass(Src, MRI->getRegClass(Dst))) {
       // Copy is the only use. Do trivial copy propagation here.
       MRI->replaceRegWith(Dst, Src);
       Copy->eraseFromParent();
@@ -429,8 +429,10 @@
         AddSSAUpdateEntry(Reg, NewReg, PredBB);
     } else {
       DenseMap<unsigned, unsigned>::iterator VI = LocalVRMap.find(Reg);
-      if (VI != LocalVRMap.end())
+      if (VI != LocalVRMap.end()) {
         MO.setReg(VI->second);
+        MRI->constrainRegClass(VI->second, MRI->getRegClass(Reg));
+      }
     }
   }
   PredBB->insert(PredBB->instr_end(), NewMI);