[llvm-commits] Clean up Hexagon ELF definition

[Evandro Menezes]

Update the name of the Hexagon processor on one hand and add its machine 
code on the other.

OK to submit?

TIA

-- 
Evandro Menezes          Austin, TX          emenezes at codeaurora.org
Qualcomm Innovation Center, Inc is a member of the Code Aurora Forum

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Index: include/llvm/Target/TargetELFWriterInfo.h
===================================================================
--- include/llvm/Target/TargetELFWriterInfo.h	(revision 156930)
+++ include/llvm/Target/TargetELFWriterInfo.h	(working copy)
@@ -43,7 +43,8 @@ namespace llvm {
       EM_ARM = 40,     // ARM
       EM_ALPHA = 41,   // DEC Alpha
       EM_SPARCV9 = 43, // SPARC V9
-      EM_X86_64 = 62   // AMD64
+      EM_X86_64 = 62,  // AMD64
+      EM_HEXAGON = 164 // Qualcomm Hexagon
     };
 
     // ELF File classes
Index: include/llvm/Support/ELF.h
===================================================================
--- include/llvm/Support/ELF.h	(revision 156930)
+++ include/llvm/Support/ELF.h	(working copy)
@@ -248,7 +248,7 @@ enum {
   EM_CYPRESS_M8C   = 161, // Cypress M8C microprocessor
   EM_R32C          = 162, // Renesas R32C series microprocessors
   EM_TRIMEDIA      = 163, // NXP Semiconductors TriMedia architecture family
-  EM_QDSP6         = 164, // QUALCOMM DSP6 Processor
+  EM_HEXAGON       = 164, // Qualcomm Hexagon Processor
   EM_8051          = 165, // Intel 8051 and variants
   EM_STXP7X        = 166, // STMicroelectronics STxP7x family of configurable
                           // and extensible RISC processors