[llvm-commits] [llvm] r156824 - in /llvm/trunk/test/CodeGen/Hexagon: args.ll combine.ll double.ll float.ll floatconvert-ieee-rnd-near.ll frame.ll mpy.ll static.ll struct_args.ll struct_args_large.ll vaddh.ll
Sirish Pande
spande at codeaurora.org
Tue May 15 09:13:12 PDT 2012
Author: sirish
Date: Tue May 15 11:13:12 2012
New Revision: 156824
URL: http://llvm.org/viewvc/llvm-project?rev=156824&view=rev
Log:
Enable all Hexagon tests.
Modified:
llvm/trunk/test/CodeGen/Hexagon/args.ll
llvm/trunk/test/CodeGen/Hexagon/combine.ll
llvm/trunk/test/CodeGen/Hexagon/double.ll
llvm/trunk/test/CodeGen/Hexagon/float.ll
llvm/trunk/test/CodeGen/Hexagon/floatconvert-ieee-rnd-near.ll
llvm/trunk/test/CodeGen/Hexagon/frame.ll
llvm/trunk/test/CodeGen/Hexagon/mpy.ll
llvm/trunk/test/CodeGen/Hexagon/static.ll
llvm/trunk/test/CodeGen/Hexagon/struct_args.ll
llvm/trunk/test/CodeGen/Hexagon/struct_args_large.ll
llvm/trunk/test/CodeGen/Hexagon/vaddh.ll
Modified: llvm/trunk/test/CodeGen/Hexagon/args.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/args.ll?rev=156824&r1=156823&r2=156824&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/args.ll (original)
+++ llvm/trunk/test/CodeGen/Hexagon/args.ll Tue May 15 11:13:12 2012
@@ -1,5 +1,4 @@
-; RUN: true
-; DISABLED: llc -march=hexagon -mcpu=hexagonv4 -disable-dfa-sched < %s | FileCheck %s
+; RUN: llc -march=hexagon -mcpu=hexagonv4 -disable-dfa-sched < %s | FileCheck %s
; CHECK: r[[T0:[0-9]+]] = #7
; CHECK: memw(r29 + #0) = r[[T0]]
; CHECK: r0 = #1
Modified: llvm/trunk/test/CodeGen/Hexagon/combine.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/combine.ll?rev=156824&r1=156823&r2=156824&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/combine.ll (original)
+++ llvm/trunk/test/CodeGen/Hexagon/combine.ll Tue May 15 11:13:12 2012
@@ -1,5 +1,4 @@
-; RUN: true
-; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
+; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
; CHECK: combine(r{{[0-9]+}}, r{{[0-9]+}})
@j = external global i32
Modified: llvm/trunk/test/CodeGen/Hexagon/double.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/double.ll?rev=156824&r1=156823&r2=156824&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/double.ll (original)
+++ llvm/trunk/test/CodeGen/Hexagon/double.ll Tue May 15 11:13:12 2012
@@ -1,5 +1,4 @@
-; RUN: true
-; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
+; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
; CHECK: __hexagon_adddf3
; CHECK: __hexagon_subdf3
Modified: llvm/trunk/test/CodeGen/Hexagon/float.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/float.ll?rev=156824&r1=156823&r2=156824&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/float.ll (original)
+++ llvm/trunk/test/CodeGen/Hexagon/float.ll Tue May 15 11:13:12 2012
@@ -1,5 +1,4 @@
-; RUN: true
-; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
+; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
; CHECK: __hexagon_addsf3
; CHECK: __hexagon_subsf3
Modified: llvm/trunk/test/CodeGen/Hexagon/floatconvert-ieee-rnd-near.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/floatconvert-ieee-rnd-near.ll?rev=156824&r1=156823&r2=156824&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/floatconvert-ieee-rnd-near.ll (original)
+++ llvm/trunk/test/CodeGen/Hexagon/floatconvert-ieee-rnd-near.ll Tue May 15 11:13:12 2012
@@ -1,5 +1,4 @@
-; RUN: true
-; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
+; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
; CHECK: __hexagon_addsf3
; CHECK: __hexagon_subsf3
Modified: llvm/trunk/test/CodeGen/Hexagon/frame.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/frame.ll?rev=156824&r1=156823&r2=156824&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/frame.ll (original)
+++ llvm/trunk/test/CodeGen/Hexagon/frame.ll Tue May 15 11:13:12 2012
@@ -1,5 +1,4 @@
-; RUN: true
-; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
+; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
@num = external global i32
@acc = external global i32
Modified: llvm/trunk/test/CodeGen/Hexagon/mpy.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/mpy.ll?rev=156824&r1=156823&r2=156824&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/mpy.ll (original)
+++ llvm/trunk/test/CodeGen/Hexagon/mpy.ll Tue May 15 11:13:12 2012
@@ -1,5 +1,4 @@
-; RUN: true
-; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
+; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
; CHECK: += mpyi
define void @foo(i32 %acc, i32 %num, i32 %num2) nounwind {
Modified: llvm/trunk/test/CodeGen/Hexagon/static.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/static.ll?rev=156824&r1=156823&r2=156824&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/static.ll (original)
+++ llvm/trunk/test/CodeGen/Hexagon/static.ll Tue May 15 11:13:12 2012
@@ -1,13 +1,12 @@
-; RUN: true
-; DISABLED: llc -march=hexagon -mcpu=hexagonv4 -disable-dfa-sched < %s | FileCheck %s
+; RUN: llc -march=hexagon -mcpu=hexagonv4 -disable-dfa-sched < %s | FileCheck %s
@num = external global i32
@acc = external global i32
@val = external global i32
-; CHECK: CONST32(#num)
-; CHECK: CONST32(#acc)
-; CHECK: CONST32(#val)
+; CHECK: memw(##num)
+; CHECK: memw(##acc)
+; CHECK: memw(##val)
define void @foo() nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/Hexagon/struct_args.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/struct_args.ll?rev=156824&r1=156823&r2=156824&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/struct_args.ll (original)
+++ llvm/trunk/test/CodeGen/Hexagon/struct_args.ll Tue May 15 11:13:12 2012
@@ -1,6 +1,6 @@
-; RUN: true
-; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
-; CHECK: r1:0 = or(r{{[0-9]}}:{{[0-9]}}, r{{[0-9]}}:{{[0-9]}})
+; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
+; CHECK: r{{[0-9]}}:{{[0-9]}} = combine(r{{[0-9]}}, r{{[0-9]}})
+; CHECK: r{{[0-9]}}:{{[0-9]}} |= asl(r{{[0-9]}}:{{[0-9]}}, #32)
%struct.small = type { i32, i32 }
Modified: llvm/trunk/test/CodeGen/Hexagon/struct_args_large.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/struct_args_large.ll?rev=156824&r1=156823&r2=156824&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/struct_args_large.ll (original)
+++ llvm/trunk/test/CodeGen/Hexagon/struct_args_large.ll Tue May 15 11:13:12 2012
@@ -1,8 +1,7 @@
-; RUN: true
-; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
+; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
; CHECK: r[[T0:[0-9]+]] = CONST32(#s2)
-; CHECK: r[[T1:[0-9]+]] = memw(r[[T0]] + #0)
-; CHECK: memw(r29 + #0) = r[[T1]]
+; CHECK: memw(r29 + #0) = r{{.}}
+; CHECK: memw(r29+#8) = r{{.}}
%struct.large = type { i64, i64 }
Modified: llvm/trunk/test/CodeGen/Hexagon/vaddh.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/vaddh.ll?rev=156824&r1=156823&r2=156824&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/vaddh.ll (original)
+++ llvm/trunk/test/CodeGen/Hexagon/vaddh.ll Tue May 15 11:13:12 2012
@@ -1,5 +1,4 @@
-; RUN: true
-; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
+; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
; CHECK: vaddh(r{{[0-9]+}}, r{{[0-9]+}})
@j = external global i32
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